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This commit is contained in:
Emil J. Tywoniak 2026-06-09 18:50:00 +02:00
parent d13dfc21f4
commit 2117af318c
23 changed files with 1684 additions and 1666 deletions
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7
frontends/aiger2/xaiger.cc
View file

@ -122,6 +122,7 @@ struct Xaiger2Frontend : public Frontend {
bits[1] = RTLIL::S1;
std::string type;
TwineSearch search(&design->twines);
while (map_file >> type) {
if (type == "pi") {
int pi_idx;
@ -132,7 +133,7 @@ struct Xaiger2Frontend : public Frontend {
int lit = (2 * pi_idx) + 2;
if (lit < 0 || lit >= (int) bits.size())
log_error("Bad map file: primary input literal out of range\n");
Wire *w = module->wire(name);
Wire *w = module->wire(search.find(name));
if (!w || woffset < 0 || woffset >= w->width)
log_error("Map file references non-existent signal bit %s[%d]\n",
name.c_str(), woffset);
@ -145,7 +146,7 @@ struct Xaiger2Frontend : public Frontend {
if (box_seq < 0)
log_error("Bad map file: box out of range\n");
Cell *box = module->cell(RTLIL::escape_id(name));
Cell *box = module->cell(search.find(RTLIL::escape_id(name)));
if (!box)
log_error("Map file references non-existent box %s\n",
name.c_str());
@ -214,7 +215,7 @@ struct Xaiger2Frontend : public Frontend {
for (auto port_id : def->ports) {
Wire *port = def->wire(port_id);
if (port->port_output) {
if (!cell->hasPort(port_id) || cell->getPort(port_id).size() != port->width)
if (!cell->hasPort(search.find(port_id)) || cell->getPort(port_id).size() != port->width)
log_error("Malformed design (1)\n");
SigSpec &conn = cell->connections_[port_id];

4
frontends/ast/ast.cc
View file

@ -1123,11 +1123,11 @@ void AST::set_src_attr(RTLIL::AttrObject *obj, const AstNode *ast)
// thousands of objects in one file this collapses N copies of a long
// path into 1 Leaf + N short Suffix tails.
TwinePool *pool = &current_module->design->twines;
Twine::Id file_id = pool->intern(*loc.begin.filename);
TwineRef file_id = pool->intern(*loc.begin.filename);
std::string tail = stringf(":%d.%d-%d.%d",
loc.begin.line, loc.begin.column,
loc.end.line, loc.end.column);
Twine::Id suffix_id = pool->intern_suffix(file_id, tail);
TwineRef suffix_id = pool->intern_suffix(file_id, tail);
pool->release(file_id); // suffix internally holds a ref now
current_module->design->obj_set_src_id(obj, suffix_id);
pool->release(suffix_id); // obj_set_src_id retained on obj's behalf

8
frontends/rtlil/rtlil_frontend.cc
View file

@ -58,8 +58,8 @@ struct RTLILFrontendWorker {
// parse_twines; consumed by parse_attribute. Parser-side ids retained
// during parse_twines are tracked here so they can be released at
// end-of-parse — only the cell/wire references should survive.
dict<size_t, Twine::Id> twine_remap;
std::vector<Twine::Id> twine_parser_holds;
dict<size_t, TwineRef> twine_remap;
std::vector<TwineRef> twine_parser_holds;
template <typename... Args>
[[noreturn]]
@ -423,7 +423,7 @@ struct RTLILFrontendWorker {
void parse_module()
{
Twine::Id module_name = design->twines.lookup(parse_id());
TwineRef module_name = design->twines.lookup(parse_id());
expect_eol();
bool delete_current_module = false;
@ -587,7 +587,7 @@ struct RTLILFrontendWorker {
// referred to a file_id has already adopted the corresponding local_id.
void release_twine_parser_holds()
{
for (Twine::Id id : twine_parser_holds)
for (TwineRef id : twine_parser_holds)
design->twines.release(id);
twine_parser_holds.clear();
twine_remap.clear();