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https://github.com/YosysHQ/yosys
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add morphCell instead of type assignments, test_cell passes for all cells
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parent
d2107a9ee4
commit
1be8f8023a
33 changed files with 129 additions and 99 deletions
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@ -125,7 +125,7 @@ void Mem::emit() {
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memid = NEW_ID;
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cell = module->addCell(memid, ID($mem_v2));
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}
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cell->type = ID($mem_v2);
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cell = cell->module->morphCell(ID($mem_v2), cell);
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cell->attributes = attributes;
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cell->parameters[ID::MEMID] = Const(memid.str());
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cell->parameters[ID::WIDTH] = Const(width);
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@ -280,7 +280,7 @@ void Mem::emit() {
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for (auto &port : rd_ports) {
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if (!port.cell)
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port.cell = module->addCell(NEW_ID, ID($memrd_v2));
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port.cell->type = ID($memrd_v2);
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port.cell = cell->module->morphCell(ID($memrd_v2), cell);
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port.cell->attributes = port.attributes;
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port.cell->parameters[ID::MEMID] = memid.str();
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port.cell->parameters[ID::ABITS] = GetSize(port.addr);
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@ -305,7 +305,7 @@ void Mem::emit() {
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for (auto &port : wr_ports) {
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if (!port.cell)
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port.cell = module->addCell(NEW_ID, ID($memwr_v2));
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port.cell->type = ID($memwr_v2);
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port.cell = cell->module->morphCell(ID($memwr_v2), cell);
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port.cell->attributes = port.attributes;
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if (port.cell->parameters.count(ID::PRIORITY))
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port.cell->parameters.erase(ID::PRIORITY);
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@ -327,7 +327,7 @@ void Mem::emit() {
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if (!init.cell)
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init.cell = module->addCell(NEW_ID, v2 ? ID($meminit_v2) : ID($meminit));
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else
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init.cell->type = v2 ? ID($meminit_v2) : ID($meminit);
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init.cell = cell->module->morphCell(v2 ? ID($meminit_v2) : ID($meminit), cell);
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init.cell->attributes = init.attributes;
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init.cell->parameters[ID::MEMID] = memid.str();
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init.cell->parameters[ID::ABITS] = GetSize(init.addr);
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