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simplify: simplify
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1 changed files with 2 additions and 3 deletions
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@ -2180,14 +2180,13 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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// use ProcessGenerator for always blocks
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// use ProcessGenerator for always blocks
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case AST_ALWAYS: {
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case AST_ALWAYS: {
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auto always = this->clone();
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ProcessGenerator generator(this->clone());
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ProcessGenerator generator(std::move(always));
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ignoreThisSignalsInInitial.append(generator.outputSignals);
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ignoreThisSignalsInInitial.append(generator.outputSignals);
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} break;
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} break;
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case AST_INITIAL: {
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case AST_INITIAL: {
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auto always = this->clone();
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auto always = this->clone();
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ProcessGenerator generator(std::move(always), ignoreThisSignalsInInitial);
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ProcessGenerator generator(this->clone(), ignoreThisSignalsInInitial);
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} break;
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} break;
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case AST_TECALL: {
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case AST_TECALL: {
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