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analogdevices: Extra tests

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`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
This commit is contained in:
Krystine Sherwin 2025-10-18 17:38:01 +13:00
parent c0d68506ed
commit 18d1ba7f1f
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6 changed files with 211 additions and 13 deletions
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18
tests/arch/analogdevices/lutram.ys
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@ -12,10 +12,9 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 8 t:FFRE
select -assert-count 8 t:RAMS32X1
select -assert-none t:BUFG t:FFRE t:RAMS32X1 %% t:* %D
select -assert-none t:FFRE t:RAMS32X1 %% t:* %D
design -reset
@ -33,10 +32,9 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w1r
dump
select -assert-count 1 t:BUFG
select -assert-count 8 t:FFRE
select -assert-count 8 t:RAMS64X1
select -assert-none t:BUFG t:FFRE t:RAMS64X1 %% t:* %D
select -assert-none t:FFRE t:RAMS64X1 %% t:* %D
design -reset
@ -53,10 +51,9 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w3r
select -assert-count 1 t:BUFG
select -assert-count 24 t:FFRE
select -assert-count 16 t:RAMD32X1
select -assert-none t:BUFG t:FFRE t:RAMD32X1 %% t:* %D
select -assert-none t:FFRE t:RAMD32X1 %% t:* %D
design -reset
@ -73,10 +70,9 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w3r
select -assert-count 1 t:BUFG
select -assert-count 24 t:FFRE
select -assert-count 16 t:RAMD64X1
select -assert-none t:BUFG t:FFRE t:RAMD64X1 %% t:* %D
select -assert-none t:FFRE t:RAMD64X1 %% t:* %D
design -reset
@ -93,10 +89,9 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 6 t:FFRE
select -assert-count 6 t:RAMS32X1
select -assert-none t:BUFG t:FFRE t:RAMS32X1 %% t:* %D
select -assert-none t:FFRE t:RAMS32X1 %% t:* %D
design -reset
@ -113,7 +108,6 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 6 t:FFRE
select -assert-count 6 t:RAMS64X1
select -assert-none t:BUFG t:FFRE t:RAMS64X1 %% t:* %D
select -assert-none t:FFRE t:RAMS64X1 %% t:* %D