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Bugfix and improvements in memory_share
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2 changed files with 40 additions and 22 deletions
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@ -243,3 +243,24 @@ module memtest10(input clk, input [5:0] din, output [5:0] dout);
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assign dout = queue[3];
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endmodule
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// ----------------------------------------------------------
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module memtest11(clk, wen, waddr, raddr, wdata, rdata);
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input clk, wen;
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input [1:0] waddr, raddr;
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input [7:0] wdata;
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output [7:0] rdata;
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reg [7:0] mem [3:0];
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assign rdata = mem[raddr];
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always @(posedge clk) begin
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if (wen)
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mem[waddr] <= wdata;
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else
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mem[waddr] <= mem[waddr];
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end
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endmodule
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