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https://github.com/YosysHQ/yosys
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aiger, xaiger, aiger2: add -no_version
This commit is contained in:
Emil J. Tywoniak
parent
bfe05965f9
commit
11c846de5c
3 changed files with 43 additions and 8 deletions
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@ -510,7 +510,7 @@ struct AigerWriter
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}
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}
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void write_aiger(std::ostream &f, bool ascii_mode, bool miter_mode, bool symbols_mode)
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void write_aiger(std::ostream &f, bool ascii_mode, bool miter_mode, bool symbols_mode, bool ys_version)
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{
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int aig_obc = aig_o + aig_b + aig_c;
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int aig_obcj = aig_obc + aig_j;
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@ -663,7 +663,8 @@ struct AigerWriter
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}
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}
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f << stringf("c\nGenerated by %s\n", yosys_version_str);
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if (ys_version)
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f << stringf("c\nGenerated by %s\n", yosys_version_str);
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}
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void write_map(std::ostream &f, bool verbose_map, bool no_startoffset)
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@ -919,6 +920,9 @@ struct AigerBackend : public Backend {
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log(" dummy input/output/bad_state-pin or latch to make the tools reading the\n");
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log(" AIGER file happy.\n");
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log("\n");
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log(" -no_version\n");
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log(" don't write Yosys version\n");
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log("\n");
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}
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void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override
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{
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@ -932,6 +936,7 @@ struct AigerBackend : public Backend {
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bool bmode = false;
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bool lmode = false;
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bool no_startoffset = false;
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bool ys_version = true;
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std::string map_filename;
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std::string yw_map_filename;
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@ -989,6 +994,10 @@ struct AigerBackend : public Backend {
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lmode = true;
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continue;
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}
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if (args[argidx] == "-no_version") {
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ys_version = false;
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continue;
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}
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break;
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}
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extra_args(f, filename, args, argidx, !ascii_mode);
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@ -1010,7 +1019,7 @@ struct AigerBackend : public Backend {
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log_error("Found unmapped memories in module %s: unmapped memories are not supported in AIGER backend!\n", log_id(top_module));
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AigerWriter writer(top_module, zinit_mode, imode, omode, bmode, lmode);
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writer.write_aiger(*f, ascii_mode, miter_mode, symbols_mode);
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writer.write_aiger(*f, ascii_mode, miter_mode, symbols_mode, ys_version);
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if (!map_filename.empty()) {
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rewrite_filename(filename);
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@ -464,7 +464,7 @@ struct XAigerWriter
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}
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}
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void write_aiger(std::ostream &f, bool ascii_mode)
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void write_aiger(std::ostream &f, bool ascii_mode, bool ys_version)
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{
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int aig_obc = aig_o;
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int aig_obcj = aig_obc;
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@ -647,7 +647,7 @@ struct XAigerWriter
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if (holes_module) {
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std::stringstream a_buffer;
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XAigerWriter writer(holes_module, false /* dff_mode */);
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writer.write_aiger(a_buffer, false /*ascii_mode*/);
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writer.write_aiger(a_buffer, false /*ascii_mode*/, ys_version);
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f << "a";
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std::string buffer_str = a_buffer.str();
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@ -671,7 +671,8 @@ struct XAigerWriter
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//f.write(reinterpret_cast<const char*>(&buffer_size_be), sizeof(buffer_size_be));
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//f.write(buffer_str.data(), buffer_str.size());
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f << stringf("Generated by %s\n", yosys_version_str);
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if (ys_version)
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f << stringf("Generated by %s\n", yosys_version_str);
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design->scratchpad_set_int("write_xaiger.num_ands", and_map.size());
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design->scratchpad_set_int("write_xaiger.num_wires", aig_map.size());
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@ -741,10 +742,13 @@ struct XAigerBackend : public Backend {
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log(" -dff\n");
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log(" write $_DFF_[NP]_ cells\n");
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log("\n");
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log(" -no_version\n");
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log(" don't write Yosys version\n");
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log("\n");
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}
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void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override
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{
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bool ascii_mode = false, dff_mode = false;
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bool ascii_mode = false, dff_mode = false, ys_version = true;
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std::string map_filename;
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log_header(design, "Executing XAIGER backend.\n");
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@ -764,6 +768,10 @@ struct XAigerBackend : public Backend {
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dff_mode = true;
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continue;
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}
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if (args[argidx] == "-no_version") {
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ys_version = false;
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continue;
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}
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break;
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}
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extra_args(f, filename, args, argidx, !ascii_mode);
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@ -782,7 +790,7 @@ struct XAigerBackend : public Backend {
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log_error("Found unmapped memories in module %s: unmapped memories are not supported in XAIGER backend!\n", log_id(top_module));
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XAigerWriter writer(top_module, dff_mode);
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writer.write_aiger(*f, ascii_mode);
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writer.write_aiger(*f, ascii_mode, ys_version);
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if (!map_filename.empty()) {
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std::ofstream mapf;
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@ -1310,6 +1310,9 @@ struct Aiger2Backend : Backend {
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log(" allow descending into submodules and write a flattened view of the design\n");
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log(" hierarchy starting at the selected top\n");
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log("\n");
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log(" -no_version\n");
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log(" don't write Yosys version\n");
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log("\n");
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log("This command is able to ingest all combinational cells except for:\n");
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log("\n");
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pool<IdString> supported = {KNOWN_OPS};
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@ -1353,15 +1356,21 @@ struct Aiger2Backend : Backend {
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size_t argidx;
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AigerWriter writer;
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writer.const_folding = true;
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bool ys_version = true;
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-strash")
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writer.strashing = true;
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else if (args[argidx] == "-flatten")
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writer.flatten = true;
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else if (args[argidx] == "-no_version")
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ys_version = false;
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else
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break;
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}
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extra_args(f, filename, args, argidx);
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// We don't actually ever print version yet,
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// we have the arg just for consistency
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(void)ys_version;
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Module *top = design->top_module();
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@ -1414,6 +1423,9 @@ struct XAiger2Backend : Backend {
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log(" reintegrate a mapping\n");
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log(" (conflicts with -flatten)\n");
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log("\n");
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log(" -no_version\n");
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log(" don't write Yosys version\n");
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log("\n");
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}
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void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, Design *design) override
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@ -1423,6 +1435,7 @@ struct XAiger2Backend : Backend {
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size_t argidx;
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XAigerWriter writer;
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std::string map_filename;
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bool ys_version = true;
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writer.const_folding = true;
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-strash")
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@ -1433,10 +1446,15 @@ struct XAiger2Backend : Backend {
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writer.mapping_prep = true;
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else if (args[argidx] == "-map2" && argidx + 1 < args.size())
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map_filename = args[++argidx];
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else if (args[argidx] == "-no_version")
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ys_version = false;
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else
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break;
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}
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extra_args(f, filename, args, argidx);
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// We don't actually ever print version yet,
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// we have the arg just for consistency
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(void)ys_version;
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Module *top = design->top_module();
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