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Move \init from source wire to submod if output port

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This commit is contained in:
Eddie Hung 2019-11-25 16:07:47 -08:00
parent dd317c9280
commit 0d7ba77426
1 changed files with 7 additions and 0 deletions
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7
passes/hierarchy/submod.cc
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@ -162,6 +162,13 @@ struct SubmodWorker
new_wire->port_input = new_wire_port_input;
new_wire->port_output = new_wire_port_output;
new_wire->attributes = wire->attributes;
if (new_wire->port_output) {
auto it = wire->attributes.find(ID(init));
if (it != wire->attributes.end()) {
new_wire->attributes[ID(init)] = it->second[bit.offset];
it->second[bit.offset] = State::Sx;
}
}
if (new_wire->port_input && new_wire->port_output)
log(" signal %s: inout %s\n", wire->name.c_str(), new_wire->name.c_str());