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Coding style update

This commit is contained in:
Jason Xu 2025-03-02 21:07:00 -05:00
parent 8f46f53f18
commit 0678c4dec9

View file

@ -674,56 +674,61 @@ struct VerilogDefines : public Pass {
} }
} VerilogDefines; } VerilogDefines;
struct VerilogFilelist : public Pass { struct VerilogFileList : public Pass {
VerilogFilelist() : Pass("verilog_filelist", "use filelist") {} VerilogFileList() : Pass("read_verilog_file_list", "Parse a Verilog file list") {}
void help() override void help() override
{ {
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n"); log("\n");
log(" verilog_filelist [options]\n"); log(" read_verilog_file_list [options]\n");
log("\n"); log("\n");
log("Load a Verilog file list, and pass list of Verilog files to read_verilog command.\n"); log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog command.\n");
log("\n"); log("\n");
log(" -Fflist\n"); log(" -F file_list_path\n");
log(" File list file contains list of Verilog to be parsed, any\n"); log(" File list file contains list of Verilog files to be parsed, any\n");
log(" ' path is relative to the file list file'\n"); log(" ' path is treated relative to the file list file'\n");
log("\n"); log("\n");
log(" -Fflist\n"); log(" -f file_list_path\n");
log(" File list file contains list of Verilog to be parsed, any\n"); log(" File list file contains list of Verilog files to be parsed, any\n");
log(" ' path is relative to current working directroy'\n"); log(" ' path is treated relative to current working directroy'\n");
log("\n"); log("\n");
} }
void parse_flist_rel_filelist(const std::string &flist_path, RTLIL::Design *design) void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path)
{ {
std::ifstream ifs(flist_path); std::ifstream flist(file_list_path);
if (!ifs.is_open()) { if (!flist.is_open()) {
log_error("file list file does not exist"); log_error("Verilog file list file does not exist");
exit(1); exit(1);
} }
std::filesystem::path flist_parent_dir = std::filesystem::path(flist_path).parent_path(); std::filesystem::path file_list_parent_dir = std::filesystem::path(file_list_path).parent_path();
std::string v_file_name; std::string v_file_name;
while (std::getline(ifs, v_file_name)) { while (std::getline(flist, v_file_name)) {
if (v_file_name.empty()) { if (v_file_name.empty()) {
continue; continue;
} }
std::string v_file_path = flist_parent_dir.string() + '/' + v_file_name;
log("Verilog file %s\n", v_file_path.c_str());
bool is_sv = (std::filesystem::path(v_file_path).extension() == ".sv"); std::string verilog_file_path;
if (relative_to_file_list_path) {
verilog_file_path = file_list_parent_dir.string() + '/' + v_file_name;
} else {
verilog_file_path = std::filesystem::current_path().string() + '/' + v_file_name;
}
bool is_sv = (std::filesystem::path(verilog_file_path).extension() == ".sv");
std::string command = "read_verilog"; std::string command = "read_verilog";
if (is_sv) { if (is_sv) {
command += " -sv"; command += " -sv";
} }
command = command + ' ' + v_file_path; command = command + ' ' + verilog_file_path;
Pass::call(design, command); Pass::call(design, command);
} }
}
void parse_flist_rel_pwd(const std::string &flist_path, RTLIL::Design *design) { log("pwd %s\n", flist_path.c_str()); } flist.close();
}
void execute(std::vector<std::string> args, RTLIL::Design *design) override void execute(std::vector<std::string> args, RTLIL::Design *design) override
{ {
@ -731,20 +736,21 @@ struct VerilogFilelist : public Pass {
for (argidx = 1; argidx < args.size(); argidx++) { for (argidx = 1; argidx < args.size(); argidx++) {
std::string arg = args[argidx]; std::string arg = args[argidx];
if (arg == "-F" && argidx + 1 < args.size()) { if (arg == "-F" && argidx + 1 < args.size()) {
std::string flist_path = args[++argidx]; std::string file_list_path = args[++argidx];
parse_flist_rel_filelist(flist_path, design); parse_file_list(file_list_path, design, true);
continue; continue;
} }
if (arg == "-f" && argidx + 1 < args.size()) { if (arg == "-f" && argidx + 1 < args.size()) {
std::string flist_path = args[++argidx]; std::string file_list_path = args[++argidx];
parse_flist_rel_pwd(flist_path, design); parse_file_list(file_list_path, design, false);
continue; continue;
} }
break; break;
} }
if (args.size() != argidx) if (args.size() != argidx) {
cmd_error(args, argidx, "Extra argument."); cmd_error(args, argidx, "Extra argument.");
}
} }
} VerilogFilelist; } VerilogFilelist;