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Make all vector-size related integer params in $print sim model signed

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This fixes iverilog crashes on 32-bit, similar to 95944eb for $mem.
This commit is contained in:
Scott Ashcroft 2025-03-25 13:08:49 +00:00
parent 59602740ee
commit 04bbd4e7e2
1 changed files with 2 additions and 2 deletions
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4
techlibs/common/simlib.v
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@ -2224,10 +2224,10 @@ module \$print (EN, TRG, ARGS);
parameter PRIORITY = 0; parameter PRIORITY = 0;
parameter FORMAT = ""; parameter FORMAT = "";
parameter ARGS_WIDTH = 0; parameter signed ARGS_WIDTH = 0;
parameter TRG_ENABLE = 1; parameter TRG_ENABLE = 1;
parameter TRG_WIDTH = 0; parameter signed TRG_WIDTH = 0;
parameter TRG_POLARITY = 0; parameter TRG_POLARITY = 0;
input EN; input EN;