From 04bbd4e7e2833060d6eb13d7749a391ccc799c5d Mon Sep 17 00:00:00 2001
From: Scott Ashcroft <scott.ashcroft@hotmail.com>
Date: Tue, 25 Mar 2025 13:08:49 +0000
Subject: [PATCH] Make all vector-size related integer params in $print sim
 model signed

This fixes iverilog crashes on 32-bit, similar to 95944eb for $mem.
---
 techlibs/common/simlib.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 028e4e5a9..6e39aa60a 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -2224,10 +2224,10 @@ module \$print (EN, TRG, ARGS);
 parameter PRIORITY = 0;
 
 parameter FORMAT = "";
-parameter ARGS_WIDTH = 0;
+parameter signed ARGS_WIDTH = 0;
 
 parameter TRG_ENABLE = 1;
-parameter TRG_WIDTH = 0;
+parameter signed TRG_WIDTH = 0;
 parameter TRG_POLARITY = 0;
 
 input EN;