Added k68 (m68k compatible cpu) test case from verilator

tests/k68_vltor/changes.diff

@@ -0,0 +1,25 @@
+diff --git a/bench/bench.cpp b/bench/bench.cpp
+index 47a50c4..de27fbb 100755
+--- a/bench/bench.cpp
++++ b/bench/bench.cpp
+@@ -71,6 +71,7 @@ int main(int argc, char **argv, char **env) {
+ 	main_time++;
+ 	top->arbclk_i = !top->arbclk_i;
+ 	if (main_time%5 == 0) top->clk = !top->clk;
++	if (main_time%100000 == 0) cout<<"Partial sum = "<<hex<<top->sum<<"\n";
+     }
+ 
+     cout<<"Final sum = "<<hex<<top->sum<<"\n";
+diff --git a/rtl/k68_clkgen.v b/rtl/k68_clkgen.v
+index c201a97..55b9cad 100755
+--- a/rtl/k68_clkgen.v
++++ b/rtl/k68_clkgen.v
+@@ -57,7 +57,7 @@ module k68_clkgen (/*AUTOARG*/
+    assign    clk4_o = cnt[1];
+    assign    clk_o = ~clk_i;
+    
+-   initial cnt = 0;	// Power up state doesn't matter, but can't be X
++   // initial cnt = 0;	// Power up state doesn't matter, but can't be X
+ 
+    always @(posedge clk_i) begin
+ 	cnt <= cnt + 1'b1;