Darryl L. Miles fa5bc957c1 -f clean: QoL improvement on Windows concerning file/dir removal locking ... When using the -f argument be more forgiving with the expectation of a clean workspace and the expectation of the new sby run being responsible for directory creation. This is a usability and quality of life improvement for Windows users where the OS can implement file and directory locking implicitly. In the EDA world it is common to have multiple tools in use at any one time and it can become tortious to have to close files / exit 3rd party applications to release locking so sby is happy to rerun. This change will prevent sby claiming a terminal error has occurred when it fails to create a directory that already exists. It also now considers the environment to be 'clean' (as per -f) if all the non-directory elements of the file tree have been deleted, leaving potentially an empty a skeleton of directories.		2023-02-18 09:36:18 +00:00
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sby.py	-f clean: QoL improvement on Windows concerning file/dir removal locking	2023-02-18 09:36:18 +00:00
sby_autotune.py	Run tasks in parallel	2022-08-18 14:38:40 +02:00
sby_core.py	-f clean: QoL improvement on Windows concerning file/dir removal locking	2023-02-18 09:36:18 +00:00
sby_design.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_engine_abc.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_engine_aiger.py	avy: Fold aiger model using abc to support assumptions	2023-01-11 18:36:06 +01:00
sby_engine_btor.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_engine_smtbmc.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_jobserver.py	Support "fifo:" make jobserver auth	2023-01-10 18:42:26 +01:00
sby_mode_bmc.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_mode_cover.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_mode_live.py	Add colors to engine header message	2022-11-24 18:12:22 +01:00
sby_mode_prove.py	Unified trace generation using yosys's sim across all engines	2023-01-10 18:42:26 +01:00
sby_sim.py	Enable yosys sim support for clock signals in hierarchical designs	2023-01-11 18:02:45 +01:00