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39 lines
1.3 KiB
Verilog
39 lines
1.3 KiB
Verilog
// A man needs to cross a river with a wolf, a goat and a cabbage. His boat is only large
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// enough to carry himself and one of his three possessions, so he must transport these
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// items one at a time. However, if he leaves the wolf and the goat together unattended,
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// then the wolf will eat the goat; similarly, if he leaves the goat and the cabbage together
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// unattended, then the goat will eat the cabbage. How can the man get across safely with
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// his three items?
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module wolf_goat_cabbage (input clk, input w, g, c);
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// everyone starts at the 1st river bank
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reg bank_w = 0; // wolf
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reg bank_g = 0; // goat
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reg bank_c = 0; // cabbage
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reg bank_m = 0; // man
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always @(posedge clk) begin
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// maximum one of the control signals must be high
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assume(w+g+c <= 1);
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// we want wolf, goat, and cabbage on the 2nd river bank
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cover(bank_w && bank_g && bank_c);
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// don't leave wolf and goat unattended
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if (bank_w != bank_m) begin
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assume(bank_w != bank_g);
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end
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// don't leave goat and cabbage unattended
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if (bank_g != bank_m) begin
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assume(bank_g != bank_c);
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end
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// man travels and takes the selected item with him
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if (w && (bank_w == bank_m)) bank_w <= !bank_m;
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if (g && (bank_g == bank_m)) bank_g <= !bank_m;
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if (c && (bank_c == bank_m)) bank_c <= !bank_m;
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bank_m <= !bank_m;
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end
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endmodule
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