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8da6f07cb3
Organize tests into subdirectories and use a new makefile that scans .sby files and allows selecting tests by mode, engine, solver and/or subdirectory. Automatically skips tests that use engines/solvers that are not found in the PATH. See `cd tests; make help` for a description of supported make targets.
9 lines
118 B
Verilog
9 lines
118 B
Verilog
module test(input [7:0] I, output O);
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assign O = ^I;
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always @(*) begin
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cover(O==1'b0);
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cover(O==1'b1);
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end
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endmodule
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