3
0
Fork 0
mirror of https://github.com/YosysHQ/sby.git synced 2025-04-07 06:44:06 +00:00
sby/docs/examples/demos/picorv32_axicheck.sby
Jannis Harder 499371fd39 Use the test Makefile for all examples
* Rename and move sbysrc/demo[123].sby to docs/examples/demos
    * Make them use multiple tasks for multiple engines
* Scan docs/examples for sby files for make test
* `make ci` is now `NOSKIP` by default
* Skip scripts using `verific` w/o yosys verific support
    * This does not fail even with NOSKIP set
2022-06-13 13:42:58 +02:00

26 lines
368 B
Plaintext

[tasks]
yices
boolector
z3
abc
[options]
mode bmc
depth 10
[engines]
yices: smtbmc yices
boolector: smtbmc boolector -ack
z3: smtbmc --nomem z3
abc: abc bmc3
[script]
read_verilog -formal -norestrict -assume-asserts picorv32.v
read_verilog -formal axicheck.v
prep -top testbench
[files]
picorv32.v ../../../extern/picorv32.v
axicheck.v ../../../extern/axicheck.v