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Code Activity
sby/tests/unsorted
History
Exact
Krystine Sherwin f17a6e118a
btor2aiger: Add test 
Based on fifo.sby, running both with and without `btor_aig on`, as well as combined with `vcd_sim on` (after an earlier version had issues when using `vcd_sim off`).

Has both pass and fail checks, so should be able to catch any major issues, although it doesn't fully check equivalence.
2024-04-06 13:56:43 +13:00
..
2props1trace.sby Refactor tests 2022-04-11 17:50:38 +02:00
allconst.sby Test designs using $allconst 2022-06-03 16:55:06 +02:00
blackbox.sby switch to using hierarchy -smtcheck for smtlib2 solvers, allowing smtlib2_module modules. 2022-06-22 21:17:29 -07:00
bmc_len.sby aiger: check supported modes and aigbmc fixes 2022-06-14 17:41:06 +02:00
both_ex.sby Refactor tests 2022-04-11 17:50:38 +02:00
both_ex.v Refactor tests 2022-04-11 17:50:38 +02:00
btor2aig.sby btor2aiger: Add test 2024-04-06 13:56:43 +13:00
btor_meminit.sby Unified trace generation using yosys's sim across all engines 2023-01-10 18:42:26 +01:00
cover.sby Refactor tests 2022-04-11 17:50:38 +02:00
cover.sv Refactor tests 2022-04-11 17:50:38 +02:00
cover_fail.sby Refactor tests 2022-04-11 17:50:38 +02:00
cover_unreachable.sby Unified trace generation using yosys's sim across all engines 2023-01-10 18:42:26 +01:00
demo.sby Test that cvc4 and cvc5 can be used 2022-06-08 13:33:12 +02:00
demo.sv Refactor tests 2022-04-11 17:50:38 +02:00
floor_divmod.sby add depth 1 2022-05-25 03:35:21 -07:00
Makefile Refactor tests 2022-04-11 17:50:38 +02:00
memory.sby Refactor tests 2022-04-11 17:50:38 +02:00
memory.sv Refactor tests 2022-04-11 17:50:38 +02:00
mixed.sby Refactor tests 2022-04-11 17:50:38 +02:00
mixed.v Refactor flow to use a common prep model 2022-08-05 16:31:15 +02:00
multi_assert.sby Refactor tests 2022-04-11 17:50:38 +02:00
no_vcd.sby Add vcd option to make VCD writing optional 2022-09-05 15:42:24 +02:00
preunsat.sby Refactor tests 2022-04-11 17:50:38 +02:00
prv32fmcmp.sby Refactor tests 2022-04-11 17:50:38 +02:00
prv32fmcmp.v Refactor tests 2022-04-11 17:50:38 +02:00
redxor.sby Refactor tests 2022-04-11 17:50:38 +02:00
redxor.v Refactor tests 2022-04-11 17:50:38 +02:00
smtlib2_module.sby switch to using hierarchy -smtcheck for smtlib2 solvers, allowing smtlib2_module modules. 2022-06-22 21:17:29 -07:00
stopfirst.sby Refactor tests 2022-04-11 17:50:38 +02:00
submod_props.sby Refactor tests 2022-04-11 17:50:38 +02:00