12 commits

Author	SHA1	Message	Date
Jannis Harder	40bf8fcb87	sby_design: Also track fairness assumptions	2024-01-24 16:08:31 +01:00
Jannis Harder	881082c990	sby_design: Discover properties represented using $check cells	2024-01-22 18:11:16 +01:00
Jannis Harder	6d3b5aa960	Unified trace generation using yosys's sim across all engines ... Currently opt-in using the `fst` or `vcd_sim` options.	2023-01-10 18:42:26 +01:00
Jannis Harder	5014d74023	sby_design: Extract total memory size and forall usage	2022-06-24 13:50:26 +02:00
N. Engelhardt	8ce526c22d	junit: use write_jny instead of write_json	2022-04-06 18:35:01 +02:00
Jannis Harder	4b512668b2	Fix design_hierarchy handling of $paramod cells	2022-03-31 15:51:58 +02:00
Jannis Harder	a78eaa57db	Fix variable name in find_property_by_cellname's error path	2022-03-31 13:12:15 +02:00
N. Engelhardt	5dc7fc9a4d	translate backslashes in cell names the same way as smt2 backend does	2022-03-22 11:14:48 +01:00
N. Engelhardt	7ee357fcc8	fix induction	2022-02-07 22:01:52 +01:00
N. Engelhardt	9168b0163b	handle status of cover properties	2022-02-06 09:15:44 +01:00
N. Engelhardt	1cf27e7c31	parse solver location output for assert failures (cover not functional yet)	2022-01-27 13:41:07 +01:00
N. Engelhardt	7f3c4137c1	create json export and read in properties	2022-01-19 19:34:11 +01:00