- Add `btor2aig_yw.py` to wrap btor2aiger calls, splitting the symbol map into a
`.aim` file and building (and approximation of) the `.ywa` file.
- Currently not tracking asserts/assumes in the `.ywa`, and yosys-witness isn't
the biggest fan of the btor2aiger style of unitialised latches. As such, the
latches are declared but the `.yw` output doesn't do anything with them so
it's incomplete. But the vcd output seems fine (for `vcd_sim=on|off`).
- Add a try/except to catch property matching with an incomplete property list.
- Add `-x` flag to `write_btor` call since aiw2yw gets confused without them.
- Includes some TODO reminders for me to fix things, but as far as I can tell it
is working.
