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Fix typo on anyconst attribute in verilog.rst

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Gus Smith 2025-11-24 14:45:32 -08:00 • committed by GitHub
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docs/source/verilog.rst
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@ -167,7 +167,7 @@ time, as in
.. code-block:: systemverilog
(* anyconst ) reg some_value;
(* anyconst *) reg some_value;
The ``(* anyconst *)`` attribute will create a solver chosen constant.
It is often used when verifying memories: the proof allows the solver to