mirror of
https://github.com/YosysHQ/sby.git
synced 2025-10-29 04:00:03 +00:00
Add cycle_width option for sim's new -width option
This commit is contained in:
parent
dbbc25a139
commit
6d0a1ed960
3 changed files with 8 additions and 0 deletions
|
|
@ -1395,6 +1395,9 @@ class SbyTask(SbyConfig):
|
|||
self.handle_bool_option("vcd", True)
|
||||
self.handle_bool_option("vcd_sim", False)
|
||||
self.handle_bool_option("fst", False)
|
||||
self.handle_int_option("cycle_width", 10)
|
||||
if self.opt_cycle_width < 2 or self.opt_cycle_width % 2 != 0:
|
||||
self.error(f"cycle_width option must be an even number >= 2, but is {self.opt_cycle_width}")
|
||||
|
||||
self.handle_bool_option("witrename", True)
|
||||
self.handle_bool_option("aigfolds", False)
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ def sim_witness_trace(prefix, task, engine_idx, witness_file, *, append, inducti
|
|||
sim_args = ""
|
||||
if inductive:
|
||||
sim_args += " -noinitstate"
|
||||
if task.opt_cycle_width != 10:
|
||||
formats.append(f"-width {task.opt_cycle_width}")
|
||||
print(f"sim -hdlname -summary {trace_name}.json -append {append}{sim_args} -r {trace_name}.yw {' '.join(formats)}", file=f)
|
||||
|
||||
def exit_callback(retval):
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue