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Update quickstart demo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -6,8 +6,8 @@ depth 100
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smtbmc
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smtbmc
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[script]
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[script]
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read_verilog -formal demo.v
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read -formal demo.sv
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prep -top demo
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prep -top demo
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[files]
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[files]
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demo.v
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demo.sv
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@ -5,11 +5,15 @@ module demo (
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reg [5:0] counter = 0;
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reg [5:0] counter = 0;
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (counter == 15)
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if (counter == 50)
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counter <= 0;
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counter <= 0;
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else
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else
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counter <= counter + 1;
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counter <= counter + 1;
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end
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end
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assert property (counter < 32);
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`ifdef FORMAL
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always @(posedge clk) begin
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assert (counter < 32);
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end
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`endif
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endmodule
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endmodule
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@ -129,7 +129,7 @@ First step: A simple BMC example
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Here is a simple example design with a safety property (assertion).
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Here is a simple example design with a safety property (assertion).
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.. literalinclude:: ../examples/quickstart/demo.v
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.. literalinclude:: ../examples/quickstart/demo.sv
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:language: systemverilog
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:language: systemverilog
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The property in this example is true. We'd like to verify this using a bounded
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The property in this example is true. We'd like to verify this using a bounded
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@ -141,7 +141,7 @@ configure SymbiYosys to run a BMC for 100 cycles on the design:
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.. literalinclude:: ../examples/quickstart/demo.sby
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.. literalinclude:: ../examples/quickstart/demo.sby
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:language: text
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:language: text
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Simply create a text file ``demo.v`` with the example design and another text
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Simply create a text file ``demo.sv`` with the example design and another text
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file ``demo.sby`` with the SymbiYosys configuration. Then run::
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file ``demo.sby`` with the SymbiYosys configuration. Then run::
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sby demo.sby
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sby demo.sby
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