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Add [script] documentation, add some paragraphs on "verific" command

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2018-04-18 19:32:58 +02:00
parent f0bf0c155a
commit 437a401739
2 changed files with 29 additions and 8 deletions

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@ -279,7 +279,28 @@ implementing the solver.
Script section
--------------
TBD
The ``[script]`` section contains the Yosys script that reads and elaborates
the design under test. For example, for a simple project contained in a single
design file ``mytest.sv`` with the top-module ``mytest``:
.. code-block:: text
[script]
read_verilog -sv mytest.sv
prep -top mytest
Or using the Verific SystemVerilog parser:
.. code-block:: text
[script]
verific -sv mytest.sv
verific -import mytest
prep -top mytest
Run ``yosys`` in a terminal window and enter ``help`` on the Yosys prompt
for a command list. Run ``help <command>`` for a detailed description of the
command, for example ``help prep``.
Files section
-------------