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@ -4,7 +4,7 @@ depth 10
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expect fail
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expect fail
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[engines]
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[engines]
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smtbmc -s boolector
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smtbmc boolector
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[script]
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[script]
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read_verilog -formal memory.v
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read_verilog -formal memory.v
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@ -102,15 +102,15 @@ proof. This engine uses the array-theories provided by those solvers to
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efficiently model memories. Since this example uses large memories, the
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efficiently model memories. Since this example uses large memories, the
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``smtbmc`` engine is a good match.
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``smtbmc`` engine is a good match.
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(``smtbmc -s boolector`` uses boolector as SMT solver. Note that boolector is
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(``smtbmc boolector`` uses boolector as SMT solver. Note that boolector is
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only free-to-use for noncommercial purposes. Use ``smtbmc -s z3`` to use the
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only free-to-use for noncommercial purposes. Use ``smtbmc z3`` to use the
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permissively licensed solver Z3 instead. Z3 is the default solver when no
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permissively licensed solver Z3 instead. Z3 is the default solver when no
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``-s`` option is used with ``smtbmc``.)
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argument is used with ``smtbmc``.)
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Exercise: The engine ``abc bmc3`` does not provide abstract memory models.
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Exercise: The engine ``abc bmc3`` does not provide abstract memory models.
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Therefore SymbiYosys has to synthesize the memories in the example to FFs
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Therefore SymbiYosys has to synthesize the memories in the example to FFs
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and address logic. How does the performance of this project change if
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and address logic. How does the performance of this project change if
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``abc bmc3`` is used as engine instead of ``smtbmc -s boolector``? How fast
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``abc bmc3`` is used as engine instead of ``smtbmc boolector``? How fast
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can either engine verify the design when the bug has been fixed?
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can either engine verify the design when the bug has been fixed?
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Beyond bounded model checks
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Beyond bounded model checks
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