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Add some docs for "prove" mode

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Clifford Wolf 2017-01-30 13:23:07 +01:00
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docs/source/index.rst
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@ -7,7 +7,7 @@ hardware verification flows. SymbiYosys provides flows for the following
formal tasks:
* Bounded verification of safety properties (assertions)
* Unbounded verification of safety properties [TBD]
* Unbounded verification of safety properties
* Generation of test benches from cover statements [TBD]
* Verification of liveness properties [TBD]
* Formal equivalence checking [TBD]