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Add some docs for "prove" mode

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Clifford Wolf 2017-01-30 13:23:07 +01:00
parent ffeee1a11f
commit 1410ac4d49
6 changed files with 82 additions and 3 deletions
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2
docs/source/index.rst
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@ -7,7 +7,7 @@ hardware verification flows. SymbiYosys provides flows for the following
formal tasks:
* Bounded verification of safety properties (assertions)
* Unbounded verification of safety properties [TBD]
* Unbounded verification of safety properties
* Generation of test benches from cover statements [TBD]
* Verification of liveness properties [TBD]
* Formal equivalence checking [TBD]

18
docs/source/quickstart.rst
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@ -116,6 +116,22 @@ can either engine verify the design when the bug has been fixed?
Beyond bounded model checks
---------------------------
TBD
Bounded model checks only prove that the safety properties hold for the first
*N* cycles (where *N* is the depth of the BMC). Sometimes this is insufficient
and we need to prove that the safety properties hold forever, not just the first
*N* cycles. Let us consider the following example:
.. literalinclude:: ../examples/quickstart/prove.v
:language: systemverilog
Proving this design in an unbounded manner can be achieved using the following
SymbiYosys configuration file:
.. literalinclude:: ../examples/quickstart/prove.sby
:language: text
Note that ``mode`` is now set to ``prove`` instead of ``bmc``. The ``smtbmc``
engine in ``prove`` mode will perform a k-induction proof. Other engines can
use other methods, e.g. using ``abc pdr`` will prove the design using the IC3
algorithm.