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https://github.com/YosysHQ/sby.git
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Merge branch 'main' into krys/symlink
This commit is contained in:
commit
1130847901
24 changed files with 1016 additions and 324 deletions
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@ -7,6 +7,7 @@ preunsat
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[options]
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mode cover
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depth 1
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cover_assert on
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pass: expect pass
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fail: expect fail
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2
tests/statusdb/Makefile
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2
tests/statusdb/Makefile
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@ -0,0 +1,2 @@
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SUBDIR=statusdb
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include ../make/subdir.mk
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65
tests/statusdb/mixed.py
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65
tests/statusdb/mixed.py
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@ -0,0 +1,65 @@
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import json
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import sqlite3
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import sys
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def get_prop_type(prop: str):
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prop = json.loads(prop or "[]")
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name_parts = prop[-1].split("_")
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if name_parts[0] == "\\check":
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# read_verilog style
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# \check_cover_mixed_v...
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return name_parts[1]
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else:
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# verific style
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# \assert_auto_verificsva_cc...
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return name_parts[0][1:]
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def main():
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workdir = sys.argv[1]
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with open(f"{workdir}/status.path", "r") as status_path_file:
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status_path = f"{workdir}/{status_path_file.read().rstrip()}"
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# read only database
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con = sqlite3.connect(f"file:{status_path}?mode=ro", uri=True)
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db = con.cursor()
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# custom sql to get all task property statuses for the current workdir
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rows = db.execute(
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"""
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SELECT task.id, task_property.id, task_property.name, task_property.src, task_property_status.status
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FROM task
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LEFT JOIN task_property ON task_property.task=task.id
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LEFT JOIN task_property_status ON task_property_status.task_property=task_property.id
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WHERE task.workdir=:workdir
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ORDER BY task_property_status.id DESC;
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""",
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{"workdir": workdir}
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).fetchall()
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# only check the most recent iteration of the test
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last_id = 0
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for row_id, _, _, _, _ in rows:
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if row_id > last_id:
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last_id = row_id
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# only check the last status of a property
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checked_props = set()
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for row_id, prop_id, prop, src, status in rows:
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if row_id != last_id:
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continue
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if prop_id in checked_props:
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continue
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checked_props.add(prop_id)
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prop_type = get_prop_type(prop)
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valid_status: list[None|str] = []
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if workdir in ["mixed_bmc", "mixed_assert"] and prop_type == "assert":
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valid_status = ["FAIL"]
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elif workdir == "mixed_bmc" and prop_type == "cover":
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valid_status = [None, "UNKNOWN"]
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elif workdir == "mixed_assert" and prop_type == "cover":
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valid_status = ["PASS", None, "UNKNOWN"]
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elif workdir == "mixed_no_assert" and prop_type == "assert":
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valid_status = [None, "UNKNOWN"]
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elif workdir == "mixed_no_assert" and prop_type == "cover":
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valid_status = ["PASS"]
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assert status in valid_status, f"Unexpected {prop_type} status {status} for {prop} ({src})"
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if __name__ == "__main__":
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main()
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24
tests/statusdb/mixed.sby
Normal file
24
tests/statusdb/mixed.sby
Normal file
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@ -0,0 +1,24 @@
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[tasks]
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no_assert cover
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assert cover
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bmc
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[options]
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cover: mode cover
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bmc: mode bmc
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bmc: depth 1
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assert: cover_assert on
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no_assert: expect pass
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~no_assert: expect fail
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[engines]
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cover: smtbmc boolector
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bmc: smtbmc boolector
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[script]
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read -formal mixed.v
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prep -top test
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[files]
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mixed.v
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4
tests/statusdb/mixed.sh
Normal file
4
tests/statusdb/mixed.sh
Normal file
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@ -0,0 +1,4 @@
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#!/bin/bash
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set -e
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python3 $SBY_MAIN -f $SBY_FILE $TASK
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python3 ${SBY_FILE%.sby}.py $WORKDIR
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16
tests/statusdb/mixed.v
Normal file
16
tests/statusdb/mixed.v
Normal file
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@ -0,0 +1,16 @@
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module test (input CP, CN, input A, B, output reg XP, XN);
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reg [7:0] counter = 0;
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always @* begin
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assume (A || B);
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assume (!A || !B);
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assert (A == B);
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cover (counter == 3 && A);
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cover (counter == 3 && B);
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end
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always @(posedge CP)
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counter <= counter + 1;
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always @(posedge CP)
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XP <= A;
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always @(negedge CN)
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XN <= B;
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endmodule
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14
tests/statusdb/reset.sby
Normal file
14
tests/statusdb/reset.sby
Normal file
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@ -0,0 +1,14 @@
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[options]
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mode bmc
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depth 100
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expect fail
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[engines]
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smtbmc --keep-going boolector
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[script]
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read -formal reset.sv
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prep -top demo
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[files]
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reset.sv
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11
tests/statusdb/reset.sh
Normal file
11
tests/statusdb/reset.sh
Normal file
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@ -0,0 +1,11 @@
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#!/bin/bash
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set -e
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# run task
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python3 $SBY_MAIN -f $SBY_FILE $TASK
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# task has 3 properties
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python3 $SBY_MAIN -f $SBY_FILE --status | wc -l | grep -q '3'
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# resetting task should work
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python3 $SBY_MAIN -f $SBY_FILE --statusreset
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# clean database should have no properties
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python3 $SBY_MAIN -f $SBY_FILE --status | wc -l | grep -q '0'
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21
tests/statusdb/reset.sv
Normal file
21
tests/statusdb/reset.sv
Normal file
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@ -0,0 +1,21 @@
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module demo (
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input clk,
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output reg [5:0] counter
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);
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initial counter = 0;
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always @(posedge clk) begin
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if (counter == 15)
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counter <= 0;
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else
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counter <= counter + 1;
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end
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`ifdef FORMAL
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always @(posedge clk) begin
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assert (1);
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assert (counter < 7);
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assert (0);
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end
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`endif
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endmodule
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130
tests/statusdb/timeout.sby
Normal file
130
tests/statusdb/timeout.sby
Normal file
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@ -0,0 +1,130 @@
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[tasks]
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btor_bmc: btor bmc
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btor_fin_bmc: btor bmc fin
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pono_bmc: pono bmc
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pono_fin_bmc: pono bmc fin
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btor_cover: btor cover
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btor_fin_cover: btor cover fin
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smt_bmc: smt bmc
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smt_fin_bmc: smt bmc fin
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smt_cover: smt cover
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smt_fin_cover: smt cover fin
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smt_prove: smt prove
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smt_fin_prove: smt prove fin
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smt_fail: smtfail bmc fail
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smt_fin_fail: smtfail bmc fail fin
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aig_bmc: aigbmc bmc
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aig_fin_bmc: aigbmc bmc fin
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aig_prove: aiger prove
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aig_fin_prove: aiger prove fin
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abc_bmc: abcbmc bmc
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abc_fin_bmc: abcbmc bmc fin
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abc_prove: abc prove
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abc_fin_prove: abc prove fin
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abc_fail: abcfail prove fail
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abc_fin_fail: abcfail prove fail fin
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[options]
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bmc: mode bmc
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cover: mode cover
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prove: mode prove
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fin:
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expect PASS,FAIL,UNKNOWN
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depth 10
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--
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~fin:
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expect TIMEOUT
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depth 40000
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timeout 1
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--
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[engines]
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btor: btor btormc
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pono: btor pono
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smt: smtbmc bitwuzla
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smtfail: smtbmc --keep-going bitwuzla
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aigbmc: aiger aigbmc
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aiger: aiger suprove
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abcbmc: abc bmc3
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abc: abc pdr
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abcfail: abc --keep-going pdr
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[script]
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fin: read -define WIDTH=4
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~fin: read -define WIDTH=8
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fail: read -define FAIL=1
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read -sv timeout.sv
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prep -top top
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[file timeout.sv]
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module top #(
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parameter WIDTH = `WIDTH
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) (
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input clk,
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input load,
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input [WIDTH-1:0] a,
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input [WIDTH-1:0] b,
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output reg [WIDTH-1:0] q,
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output reg [WIDTH-1:0] r,
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output reg done
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);
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reg [WIDTH-1:0] a_reg = 0;
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reg [WIDTH-1:0] b_reg = 1;
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initial begin
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q <= 0;
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r <= 0;
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done <= 1;
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end
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reg [WIDTH-1:0] q_step = 1;
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reg [WIDTH-1:0] r_step = 1;
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// This is not how you design a good divider circuit!
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always @(posedge clk) begin
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if (load) begin
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a_reg <= a;
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b_reg <= b;
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q <= 0;
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r <= a;
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q_step <= 1;
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r_step <= b;
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done <= b == 0;
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end else begin
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if (r_step <= r) begin
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q <= q + q_step;
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r <= r - r_step;
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if (!r_step[WIDTH-1]) begin
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r_step <= r_step << 1;
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q_step <= q_step << 1;
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end
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end else begin
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if (!q_step[0]) begin
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r_step <= r_step >> 1;
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q_step <= q_step >> 1;
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end else begin
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done <= 1;
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end
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end
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end
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end
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always @(posedge clk) begin
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assert (1); // trivial
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`ifdef FAIL
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assert (0);
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`endif
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assert (r_step == b_reg * q_step); // Helper invariant
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assert (q * b_reg + r == a_reg); // Main invariant & correct output relationship
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if (done) assert (r <= b_reg - 1); // Output range
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cover (done);
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cover (done && b_reg == 0);
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cover (r != a_reg);
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cover (r == a_reg);
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cover (0); // unreachable
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end
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endmodule
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22
tests/statusdb/timeout.sh
Normal file
22
tests/statusdb/timeout.sh
Normal file
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@ -0,0 +1,22 @@
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#!/bin/bash
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set -e
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python3 $SBY_MAIN -f $SBY_FILE $TASK
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STATUS_CSV=${WORKDIR}/status.csv
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python3 $SBY_MAIN -f $SBY_FILE $TASK --statuscsv --latest | tee $STATUS_CSV
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if [[ $TASK =~ "_cover" ]]; then
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wc -l $STATUS_CSV | grep -q '6'
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grep "COVER" $STATUS_CSV | wc -l | grep -q '5'
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elif [[ $TASK =~ "_fail" ]]; then
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wc -l $STATUS_CSV | grep -q '6'
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grep "ASSERT" $STATUS_CSV | wc -l | grep -q '5'
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grep "FAIL" $STATUS_CSV | wc -l | grep -q '1'
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else
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wc -l $STATUS_CSV | grep -q '5'
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grep "ASSERT" $STATUS_CSV | wc -l | grep -q '4'
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fi
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if [[ $TASK == "smt_cover" ]]; then
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grep "PASS" $STATUS_CSV | wc -l | grep -q '4'
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fi
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@ -8,6 +8,9 @@ cover: mode cover
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bmc: mode bmc
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bmc: depth 1
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cover: expect pass
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~cover: expect fail
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[engines]
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cover: btor btormc
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btormc: btor btormc
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@ -3,7 +3,7 @@ module test (input CP, CN, input A, B, output reg XP, XN);
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always @* begin
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assume (A || B);
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assume (!A || !B);
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assert (A != B);
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assert (A == B);
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cover (counter == 3 && A);
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cover (counter == 3 && B);
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end
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