mirror of
https://github.com/YosysHQ/sby.git
synced 2025-04-06 14:24:08 +00:00
Fix bug in /examples/quickstart/prove.v
This commit is contained in:
parent
1410ac4d49
commit
0a1f207ab5
|
@ -22,7 +22,7 @@ module demo (
|
||||||
output reg [7:0] dout
|
output reg [7:0] dout
|
||||||
);
|
);
|
||||||
reg [7:0] buffer;
|
reg [7:0] buffer;
|
||||||
reg [2:0] state;
|
reg [1:0] state;
|
||||||
|
|
||||||
always @(posedge clk) begin
|
always @(posedge clk) begin
|
||||||
if (reset) begin
|
if (reset) begin
|
||||||
|
@ -30,17 +30,17 @@ module demo (
|
||||||
state <= 0;
|
state <= 0;
|
||||||
end else
|
end else
|
||||||
case (state)
|
case (state)
|
||||||
3'b 001: begin
|
0: begin
|
||||||
buffer <= din;
|
buffer <= din;
|
||||||
state <= 1;
|
state <= 1;
|
||||||
end
|
end
|
||||||
3'b 010: begin
|
1: begin
|
||||||
if (buffer[1:0])
|
if (buffer[1:0])
|
||||||
buffer <= buffer + 1;
|
buffer <= buffer + 1;
|
||||||
else
|
else
|
||||||
state <= 2;
|
state <= 2;
|
||||||
end
|
end
|
||||||
3'b 100: begin
|
2: begin
|
||||||
dout <= dout + buffer;
|
dout <= dout + buffer;
|
||||||
state <= 0;
|
state <= 0;
|
||||||
end
|
end
|
||||||
|
|
Loading…
Reference in a new issue