174 lines
17 KiB
XML
174 lines
17 KiB
XML
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<tspan x="440" y="-20.15">Core 0</tspan>
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<tspan x="80" y="13.9">Next PC</tspan>
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<tspan x="80" y="64.425">BTB</tspan>
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<tspan x="80" y="184.425">ITLB</tspan>
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<tspan x="80" y="284.425">μOp Cache</tspan>
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<tspan x="260" y="176.425">L2 TLB &</tspan>
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<tspan x="260" y="192.425">Page Table Walker</tspan>
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<tspan x="260" y="284.425">L1I Cache</tspan>
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<tspan x="540" y="64.425">L2 Cache</tspan>
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<tspan x="260" y="396.425">PowerISA Simple</tspan>
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<tspan x="260" y="412.425">Decode</tspan>
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<tspan x="440" y="396.425">Programmable</tspan>
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<tspan x="440" y="412.425">Decoder</tspan>
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<tspan x="80" y="516.425">Register Rename &</tspan>
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<tspan x="80" y="532.425">Unit Assignment</tspan>
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<tspan x="260" y="516.425">Register Allocator &</tspan>
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<tspan x="260" y="532.425">Instruction Retire</tspan>
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<tspan x="80" y="644.425">ALU & Branch</tspan>
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<tspan x="260" y="644.425">ALU</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="620" y="524.425">
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<tspan x="620" y="524.425">Load/Store</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="800" y="404.425">
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<tspan x="800" y="404.425">L1D Cache</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="800" y="524.425">
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<tspan x="800" y="524.425">DTLB</tspan>
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<tspan x="440" y="524.425">L2 Register File</tspan>
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<line style="fill: none; stroke-opacity: 1; stroke-width: 2; stroke: #000000" x1="260" y1="580" x2="440" y2="580"/>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="40" y="-195.575">
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<tspan x="40" y="-195.575">Memory</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="520" y="-95.575">
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<tspan x="520" y="-95.575">L3 Cache</tspan>
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<tspan x="1010" y="-20.15">Other Cores</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:normal" x="1000" y="-195.575">
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<tspan x="1000" y="-195.575">Peripherals</tspan>
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<tspan x="440" y="644.425">Mul</tspan>
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</text>
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<tspan x="620" y="644.425">FMul/FAdd</tspan>
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<tspan x="800" y="644.425">Div/FDiv/FSqrt</tspan>
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<text font-size="12.8" style="fill: #000000; fill-opacity: 1; stroke: none;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:normal" x="304" y="-225.575">
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<tspan x="304" y="-225.575">Needed for Initial Working CPU</tspan>
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<tspan x="304" y="-185.575">Possible Follow-on Work</tspan>
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