add WIP CPU architecture draft proposal
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This commit is contained in:
Jacob Lifshay 2024-09-11 19:25:02 -07:00
parent 0442390142
commit e9aaaec5f1
Signed by: programmerjake
SSH key fingerprint: SHA256:B1iRVvUJkvd7upMIiMqn6OyxvD2SgJkAH3ZnUOj6z+c
7 changed files with 202 additions and 3 deletions

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@ -13,8 +13,10 @@ jobs:
- uses: https://code.forgejo.org/actions/checkout@v3
with:
fetch-depth: 0
- name: Install latest mdbook
- name: Install dependencies
run: |
apt-get update -qq
apt-get install -qq dia python3
scripts/install_deps.sh
echo "`pwd`"/bin >> $GITHUB_PATH
- name: Build Book

3
.gitignore vendored
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@ -1,3 +1,4 @@
book
/*.tar.gz
/mermaid.min.js
/mermaid.min.js
*.dia.svg

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@ -14,6 +14,9 @@ edition = "2021"
[preprocessor.mermaid]
command = "mdbook-mermaid"
[preprocessor.dia]
command = "scripts/mdbook-dia.py"
[output.html]
mathjax-support = true
no-section-label = true
@ -25,4 +28,8 @@ additional-css = ["src/custom.css"]
additional-js = ["mermaid.min.js", "mermaid-init.js"]
[output.html.print]
enable = false
enable = false
[output.html.fold]
enable = true
level = 1

26
scripts/mdbook-dia.py Executable file
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@ -0,0 +1,26 @@
#!/usr/bin/env python3
import json
import sys
import os
import subprocess
from pathlib import Path
def main():
if len(sys.argv) > 1:
if sys.argv[1] == "supports":
sys.exit(0)
sys.exit(1)
out = sys.stdout
sys.stdout = sys.stderr
context, book = json.load(sys.stdin)
src: Path = Path(context["root"]) / context["config"]["book"]["src"]
for root, dirs, files in os.walk(src):
for file in files:
file = Path(root) / file
if file.suffix == ".dia":
out_file = file.with_suffix(".dia.svg")
subprocess.run(["dia", "-n", "-e", out_file, file], check=True)
print(json.dumps(book), file=out)
if __name__ == "__main__":
main()

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@ -1,4 +1,5 @@
* [Libre-Chip](README.md)
* [Proposal for Libre-Chip's First CPU Architecture (Draft)](first_arch/index.md)
* [Conduct](Conduct.md)
* [License](LICENSE.md)
* [GPL 3.0](gpl-3.0.md)

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@ -0,0 +1,145 @@
<?xml version="1.0" encoding="UTF-8"?>
<dia:diagram xmlns:dia="http://www.lysator.liu.se/~alla/dia/">
<dia:diagramdata>
<dia:attribute name="background">
<dia:color val="#ffffffff"/>
</dia:attribute>
<dia:attribute name="pagebreak">
<dia:color val="#000099ff"/>
</dia:attribute>
<dia:attribute name="paper">
<dia:composite type="paper">
<dia:attribute name="name">
<dia:string>#Letter#</dia:string>
</dia:attribute>
<dia:attribute name="tmargin">
<dia:real val="2.5399999618530273"/>
</dia:attribute>
<dia:attribute name="bmargin">
<dia:real val="2.5399999618530273"/>
</dia:attribute>
<dia:attribute name="lmargin">
<dia:real val="2.5399999618530273"/>
</dia:attribute>
<dia:attribute name="rmargin">
<dia:real val="2.5399999618530273"/>
</dia:attribute>
<dia:attribute name="is_portrait">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="scaling">
<dia:real val="1"/>
</dia:attribute>
<dia:attribute name="fitto">
<dia:boolean val="false"/>
</dia:attribute>
</dia:composite>
</dia:attribute>
<dia:attribute name="grid">
<dia:composite type="grid">
<dia:attribute name="dynamic">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="width_x">
<dia:real val="0.125"/>
</dia:attribute>
<dia:attribute name="width_y">
<dia:real val="0.125"/>
</dia:attribute>
<dia:attribute name="visible_x">
<dia:int val="1"/>
</dia:attribute>
<dia:attribute name="visible_y">
<dia:int val="1"/>
</dia:attribute>
<dia:composite type="color"/>
</dia:composite>
</dia:attribute>
<dia:attribute name="color">
<dia:color val="#d8e5e5ff"/>
</dia:attribute>
<dia:attribute name="guides">
<dia:composite type="guides">
<dia:attribute name="hguides"/>
<dia:attribute name="vguides"/>
</dia:composite>
</dia:attribute>
<dia:attribute name="display">
<dia:composite type="display">
<dia:attribute name="antialiased">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="snap-to-grid">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="snap-to-object">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="show-grid">
<dia:boolean val="true"/>
</dia:attribute>
<dia:attribute name="show-connection-points">
<dia:boolean val="true"/>
</dia:attribute>
</dia:composite>
</dia:attribute>
</dia:diagramdata>
<dia:layer name="Background" visible="true" connectable="true" active="true">
<dia:object type="Standard - Box" version="0" id="O0">
<dia:attribute name="obj_pos">
<dia:point val="1,1"/>
</dia:attribute>
<dia:attribute name="obj_bb">
<dia:rectangle val="0.95,0.95;10.05,9.05"/>
</dia:attribute>
<dia:attribute name="elem_corner">
<dia:point val="1,1"/>
</dia:attribute>
<dia:attribute name="elem_width">
<dia:real val="9"/>
</dia:attribute>
<dia:attribute name="elem_height">
<dia:real val="8"/>
</dia:attribute>
<dia:attribute name="show_background">
<dia:boolean val="true"/>
</dia:attribute>
</dia:object>
<dia:object type="Standard - Text" version="1" id="O1">
<dia:attribute name="obj_pos">
<dia:point val="5.5,5"/>
</dia:attribute>
<dia:attribute name="obj_bb">
<dia:rectangle val="5.5,4.38732;7.40612,5.18818"/>
</dia:attribute>
<dia:attribute name="text">
<dia:composite type="text">
<dia:attribute name="string">
<dia:string>#TODO#</dia:string>
</dia:attribute>
<dia:attribute name="font">
<dia:font family="sans" style="0" name="Helvetica"/>
</dia:attribute>
<dia:attribute name="height">
<dia:real val="0.80000000000000004"/>
</dia:attribute>
<dia:attribute name="pos">
<dia:point val="5.5,5"/>
</dia:attribute>
<dia:attribute name="color">
<dia:color val="#000000ff"/>
</dia:attribute>
<dia:attribute name="alignment">
<dia:enum val="0"/>
</dia:attribute>
</dia:composite>
</dia:attribute>
<dia:attribute name="valign">
<dia:enum val="3"/>
</dia:attribute>
<dia:connections>
<dia:connection handle="0" to="O0" connection="8"/>
</dia:connections>
</dia:object>
</dia:layer>
</dia:diagram>

17
src/first_arch/index.md Normal file
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@ -0,0 +1,17 @@
# Proposal for Libre-Chip's First CPU Architecture (Draft)
## Stages
The CPU architecture will be developed in several stages:
1. Getting an initial working CPU -- First NLNet/etc. Grant
Possible follow-on work, order TBD:
* Expand CPU to support more operations (e.g. floating-point, vector ops., paging)
* Add FPGA-style programmable decoder and &mu;Op Cache, with trap-to-software fallback for uncommon/complex ops, which allows running more ISAs such as RISC-V, older x86-32/64, more PowerISA support, and then if we can figure out the legal situation, ARM and modern x86-64. The idea is QEMU (or similar) will be compiled with a special compiler that generates both the fallback software and the bitstream for the decoder, the compiled output will be covered by QEMU's license which has some patent clauses, which hopefully helps with the legal situation. Jacob Lifshay came up with this idea [back in 2022](https://web.archive.org/web/20220612082603/https://bugs.libre-soc.org/show_bug.cgi?id=841)
* Formal proof that the CPU doesn't have any spectre-style bugs even though it still is OoO superscalar with speculative execution. Jacob Lifshay came up with this idea [back in 2020](https://web.archive.org/web/20201021124234/https://bugs.libre-soc.org/show_bug.cgi?id=209)
## Architecture
![](architecture.dia.svg)