From e9aaaec5f15192776787378c9f25f4b945ca27fe Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Wed, 11 Sep 2024 19:25:02 -0700 Subject: [PATCH] add WIP CPU architecture draft proposal --- .forgejo/workflows/deploy.yml | 4 +- .gitignore | 3 +- book.toml | 9 +- scripts/mdbook-dia.py | 26 ++++++ src/SUMMARY.md | 1 + src/first_arch/architecture.dia | 145 ++++++++++++++++++++++++++++++++ src/first_arch/index.md | 17 ++++ 7 files changed, 202 insertions(+), 3 deletions(-) create mode 100755 scripts/mdbook-dia.py create mode 100644 src/first_arch/architecture.dia create mode 100644 src/first_arch/index.md diff --git a/.forgejo/workflows/deploy.yml b/.forgejo/workflows/deploy.yml index c306895..c61df54 100644 --- a/.forgejo/workflows/deploy.yml +++ b/.forgejo/workflows/deploy.yml @@ -13,8 +13,10 @@ jobs: - uses: https://code.forgejo.org/actions/checkout@v3 with: fetch-depth: 0 - - name: Install latest mdbook + - name: Install dependencies run: | + apt-get update -qq + apt-get install -qq dia python3 scripts/install_deps.sh echo "`pwd`"/bin >> $GITHUB_PATH - name: Build Book diff --git a/.gitignore b/.gitignore index ae97d85..7e2fa27 100644 --- a/.gitignore +++ b/.gitignore @@ -1,3 +1,4 @@ book /*.tar.gz -/mermaid.min.js \ No newline at end of file +/mermaid.min.js +*.dia.svg \ No newline at end of file diff --git a/book.toml b/book.toml index 818ef70..41e58f8 100644 --- a/book.toml +++ b/book.toml @@ -14,6 +14,9 @@ edition = "2021" [preprocessor.mermaid] command = "mdbook-mermaid" +[preprocessor.dia] +command = "scripts/mdbook-dia.py" + [output.html] mathjax-support = true no-section-label = true @@ -25,4 +28,8 @@ additional-css = ["src/custom.css"] additional-js = ["mermaid.min.js", "mermaid-init.js"] [output.html.print] -enable = false \ No newline at end of file +enable = false + +[output.html.fold] +enable = true +level = 1 \ No newline at end of file diff --git a/scripts/mdbook-dia.py b/scripts/mdbook-dia.py new file mode 100755 index 0000000..95e9f1a --- /dev/null +++ b/scripts/mdbook-dia.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python3 +import json +import sys +import os +import subprocess +from pathlib import Path + +def main(): + if len(sys.argv) > 1: + if sys.argv[1] == "supports": + sys.exit(0) + sys.exit(1) + out = sys.stdout + sys.stdout = sys.stderr + context, book = json.load(sys.stdin) + src: Path = Path(context["root"]) / context["config"]["book"]["src"] + for root, dirs, files in os.walk(src): + for file in files: + file = Path(root) / file + if file.suffix == ".dia": + out_file = file.with_suffix(".dia.svg") + subprocess.run(["dia", "-n", "-e", out_file, file], check=True) + print(json.dumps(book), file=out) + +if __name__ == "__main__": + main() \ No newline at end of file diff --git a/src/SUMMARY.md b/src/SUMMARY.md index 1b0cd95..9ca92ab 100644 --- a/src/SUMMARY.md +++ b/src/SUMMARY.md @@ -1,4 +1,5 @@ * [Libre-Chip](README.md) + * [Proposal for Libre-Chip's First CPU Architecture (Draft)](first_arch/index.md) * [Conduct](Conduct.md) * [License](LICENSE.md) * [GPL 3.0](gpl-3.0.md) diff --git a/src/first_arch/architecture.dia b/src/first_arch/architecture.dia new file mode 100644 index 0000000..6e5b95a --- /dev/null +++ b/src/first_arch/architecture.dia @@ -0,0 +1,145 @@ + + + + + + + + + + + + + #Letter# + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + #TODO# + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/first_arch/index.md b/src/first_arch/index.md new file mode 100644 index 0000000..ff51d99 --- /dev/null +++ b/src/first_arch/index.md @@ -0,0 +1,17 @@ +# Proposal for Libre-Chip's First CPU Architecture (Draft) + +## Stages + +The CPU architecture will be developed in several stages: + +1. Getting an initial working CPU -- First NLNet/etc. Grant + +Possible follow-on work, order TBD: + +* Expand CPU to support more operations (e.g. floating-point, vector ops., paging) +* Add FPGA-style programmable decoder and μOp Cache, with trap-to-software fallback for uncommon/complex ops, which allows running more ISAs such as RISC-V, older x86-32/64, more PowerISA support, and then if we can figure out the legal situation, ARM and modern x86-64. The idea is QEMU (or similar) will be compiled with a special compiler that generates both the fallback software and the bitstream for the decoder, the compiled output will be covered by QEMU's license which has some patent clauses, which hopefully helps with the legal situation. Jacob Lifshay came up with this idea [back in 2022](https://web.archive.org/web/20220612082603/https://bugs.libre-soc.org/show_bug.cgi?id=841) +* Formal proof that the CPU doesn't have any spectre-style bugs even though it still is OoO superscalar with speculative execution. Jacob Lifshay came up with this idea [back in 2020](https://web.archive.org/web/20201021124234/https://bugs.libre-soc.org/show_bug.cgi?id=209) + +## Architecture + +![](architecture.dia.svg) \ No newline at end of file