libre-chip/cpu

Author	SHA1	Message	Date
Jacob Lifshay	9781f1f4c5	update to latest fayalite to include bug fix libre-chip/fayalite#16 All checks were successful / deps (push) Successful in 14s Details / test (push) Successful in 26m2s Details	2025-01-15 19:14:31 -08:00
Jacob Lifshay	89717f8916	update to latest version of fayalite All checks were successful / deps (push) Successful in 14s Details / test (push) Successful in 25m30s Details	2025-01-09 23:36:23 -08:00
Jacob Lifshay	24a8b4b71b	update fayalite to latest git All checks were successful / deps (push) Successful in 11m31s Details / test (push) Successful in 26m35s Details	2025-01-09 19:39:25 -08:00
Jacob Lifshay	bf34dee043	update to fayalite commit 9b06019bf54303e51989484a0cfa1641b0e9d543 All checks were successful / deps (push) Successful in 13s Details / test (push) Successful in 25m44s Details	2024-12-18 22:36:08 -08:00
Jacob Lifshay	1761d7094e	update to latest fayalite and match rust version All checks were successful / deps (push) Successful in 11m31s Details / test (push) Successful in 26m29s Details	2024-12-15 20:32:27 -08:00
Jacob Lifshay	1a72425156	update fayalite dependency	2024-11-05 17:33:24 -08:00
Jacob Lifshay	b54e40561f	limit parallelism based on available memory too	2024-10-15 21:56:53 -07:00
Jacob Lifshay	aaa2cb193e	add formal proof for unit_free_regs_tracker Some checks failed / test (push) Failing after 3h11m43s Details	2024-10-15 02:39:56 -07:00
Jacob Lifshay	cb5855589f	WIP adding register allocator All checks were successful / test (push) Successful in 46m24s Details	2024-10-14 21:20:42 -07:00
Jacob Lifshay	1a44fcc609	update fayalite dependency	2024-10-11 17:34:12 -07:00
Jacob Lifshay	4c3dd128a3	WIP: adding micro ops	2024-10-10 22:57:11 -07:00
Jacob Lifshay	0f4f067996	start adding cpu data types	2024-10-08 20:22:15 -07:00

12 commits