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6ee0d4265c
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switch to using fayalite version of checked_vcd_output instead of cpu::util
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2026-06-17 18:22:33 -07:00 |
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ef30d325d5
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formal proof works! also add test_power_isa_add_sim
/ test (pull_request) Failing after 22m21s
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2026-06-05 19:46:24 -07:00 |
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7481d079d5
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redo ShiftRotateMOp and write actual operation definition in doc comment
/ test (pull_request) Successful in 6m56s
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2026-05-28 01:41:31 -07:00 |
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99c019431b
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unit::alu_branch: implement for ShiftRotateMOp; TODO: flags and shift amount overflow
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2026-05-25 23:15:43 -07:00 |
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dd2fe36869
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rename_execute_retire: add more tests using unit::alu_branch
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2026-05-25 21:31:43 -07:00 |
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5558763718
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rename test_rename_execute_retire_real_alu_branch -> test_rename_execute_retire_save_restore_gprs_real
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2026-05-25 18:35:59 -07:00 |
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7151841af5
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make Unit API work with rename_execute_retire and add a rename_execute_retire test using unit::alu_branch
/ test (pull_request) Successful in 6m13s
/ test (push) Successful in 7m10s
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2026-05-24 22:23:23 -07:00 |
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a88009a303
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add GlobalState to ExecuteToUnitInterface
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2026-05-24 19:56:14 -07:00 |
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ce8519b2db
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util: add and use checked_vcd_output
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2026-05-24 19:49:10 -07:00 |
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3e08a282ec
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add test_rename_execute_retire_save_restore_gprs
currently it fails due to the L2 reg file running out of output registers
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2026-05-20 19:44:20 -07:00 |
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6026df8d7a
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rename_execute_retire: generate l2 stores earlier to make more space in units to increase throughput
/ test (pull_request) Successful in 5m45s
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2026-05-20 17:02:34 -07:00 |
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0d69666b00
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tests/rename_execute_retire: add and use mock_combinational_unit
/ test (pull_request) Successful in 6m18s
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2026-05-19 19:33:09 -07:00 |
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2363e65564
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tests/rename_execute_retire: make loads/stores take more than one cycle to execute
/ test (pull_request) Successful in 6m19s
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2026-05-19 18:08:07 -07:00 |
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79ac190093
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rename_execute_retire: add a head -n1 test
/ test (pull_request) Successful in 9m24s
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2026-05-18 22:22:31 -07:00 |
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0d3c41fa14
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add TraceAsString around instructions and stuff to make the .vcd files much smaller and easier to read
/ test (pull_request) Successful in 5m44s
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2026-05-14 22:38:50 -07:00 |
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3fbdab0862
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rename_execute_retire: implement generating L2 reg file writes
/ test (pull_request) Successful in 12m13s
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2026-05-10 23:39:02 -07:00 |
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33b5d59507
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improve debug formatting of PRegValue and PRegFlags
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2026-05-07 21:40:23 -07:00 |
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5e6041a97c
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change MOp to use SrcReg: Type instead of UIntType<SrcRegWidth>
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2026-05-07 19:56:56 -07:00 |
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09c8c194e0
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group micro ops by the instruction they come from when retiring
/ test (pull_request) Failing after 3m56s
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2026-05-05 19:33:25 -07:00 |
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83b3f7bac9
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use custom debug
/ test (pull_request) Failing after 3m57s
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2026-05-03 23:35:19 -07:00 |
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ba9ec3bd29
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adapt code for new fayalite features
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2026-05-03 23:35:19 -07:00 |
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283117d8df
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add support for speculative loads
/ test (pull_request) Failing after 9m18s
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2026-04-30 17:51:33 -07:00 |
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4d21ca622b
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add initial impl of rename_execute_retire; running a recursive fibonacci gives the correct output
/ test (pull_request) Failing after 12m14s
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2026-04-24 18:13:27 -07:00 |
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