wrote out all of next_pc and tests/next_pc
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SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
4 changed files with 1871 additions and 703 deletions
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@ -163,3 +163,15 @@ pub type CpuConfigFetchWidthInBytes<C: PhantomConstGet<CpuConfig>> = DynSize;
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#[hdl(get(|c| c.rob_size.get()))]
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pub type CpuConfigRobSize<C: PhantomConstGet<CpuConfig>> = DynSize;
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pub trait PhantomConstCpuConfig:
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PhantomConstGet<CpuConfig>
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+ Into<PhantomConst<CpuConfig>>
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+ From<PhantomConst<CpuConfig>>
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+ Type
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+ ToSimValue<Type = Self>
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+ ToExpr<Type = Self>
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{
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}
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impl PhantomConstCpuConfig for PhantomConst<CpuConfig> {}
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File diff suppressed because it is too large
Load diff
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@ -190,6 +190,35 @@ impl<T: Type, N: Size> ArrayVec<T, N> {
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mapped_array_vec
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}
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#[hdl]
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pub fn map_sim<U: Type>(
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this: impl ToSimValue<Type = Self>,
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uninit_element: impl ToSimValue<Type = U>,
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mut f: impl FnMut(usize, SimValue<T>) -> SimValue<U>,
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) -> SimValue<ArrayVec<U, N>> {
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let this = this.into_sim_value();
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let uninit_element = uninit_element.into_sim_value();
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let ty = this.ty().mapped_ty(uninit_element.ty());
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#[hdl(sim)]
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let Self { elements, len } = this;
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#[hdl(sim)]
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ArrayVec::<_, _> {
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elements: SimValue::from_array_elements(
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ty.elements,
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SimValue::into_value(elements)
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.into_iter()
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.enumerate()
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.map(|(index, element)| {
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if index < *len {
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f(index, element)
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} else {
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uninit_element.clone()
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}
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}),
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),
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len,
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}
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}
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#[hdl]
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pub fn as_array_of_options(this: impl ToExpr<Type = Self>) -> Expr<ArrayType<HdlOption<T>, N>> {
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let this = this.to_expr();
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#[hdl]
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@ -217,3 +246,34 @@ where
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<ArrayType<T, N> as ExprIndex<Idx>>::expr_index(&this.elements, index)
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}
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}
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impl<T: Type> ArrayVec<T, ConstUsize<1>> {
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#[hdl]
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pub fn from_opt_sim(
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opt: impl ToSimValue<Type = HdlOption<T>>,
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uninit_element: impl ToSimValueWithType<T>,
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) -> SimValue<Self> {
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let opt = opt.into_sim_value();
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let ty = ArrayVec[opt.ty().HdlSome][ConstUsize];
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#[hdl(sim)]
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match opt {
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HdlSome(v) => ty.new_full_sim([v]),
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HdlNone => ty.new_sim(uninit_element),
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}
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}
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#[hdl]
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pub fn into_opt_sim(this: impl ToSimValue<Type = Self>) -> SimValue<HdlOption<T>> {
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let this = this.into_sim_value();
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#[hdl(sim)]
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let Self { elements, len } = this;
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let [element] = SimValue::into_value(elements);
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let ty = HdlOption[element.ty()];
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if *len == 0 {
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#[hdl(sim)]
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ty.HdlNone()
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} else {
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#[hdl(sim)]
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ty.HdlSome(element)
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}
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}
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}
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@ -78,7 +78,7 @@ const DEMO_ILLEGAL_INSN_TRAP: u64 = 0xFF000000u64;
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#[hdl]
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struct FetchPipeQueueEntry {
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fetch_pc: UInt<64>,
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start_pc: UInt<64>,
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cycles_left: UInt<8>,
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fetch_block_id: UInt<{ FETCH_BLOCK_ID_WIDTH }>,
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}
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@ -88,7 +88,7 @@ impl FetchPipeQueueEntry {
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fn default_sim(self) -> SimValue<Self> {
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#[hdl(sim)]
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FetchPipeQueueEntry {
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fetch_pc: 0u64,
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start_pc: 0u64,
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cycles_left: 0u8,
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fetch_block_id: 0u8,
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}
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@ -129,7 +129,8 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
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sim.resettable(
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cd,
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async |mut sim| {
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sim.write(from_fetch.inner.ready, false).await;
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sim.write(from_fetch.fetch.ready, false).await;
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sim.write(from_fetch.cancel.ready, false).await;
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sim.write(
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to_post_decode.inner.data,
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to_post_decode.ty().inner.data.HdlNone(),
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@ -179,21 +180,21 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
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if let Some(front) = queue.front().filter(|v| v.cycles_left.as_int() == 0) {
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#[hdl(sim)]
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let FetchPipeQueueEntry {
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fetch_pc,
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start_pc,
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cycles_left: _,
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fetch_block_id,
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} = front;
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let fetch_pc = fetch_pc.as_int();
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let fetch_end =
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(fetch_pc + 1).next_multiple_of(config.get().fetch_width_in_bytes() as u64);
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let start_pc = start_pc.as_int();
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let end_pc =
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(start_pc + 1).next_multiple_of(config.get().fetch_width_in_bytes() as u64);
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let insns = to_post_decode.ty().inner.data.HdlSome.insns;
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let zeroed_insn = UInt[insns.element().canonical().bit_width()]
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.zero()
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.cast_bits_to(insns.element());
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let mut insns = insns.new_sim(zeroed_insn);
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let mut expected_pc = fetch_pc;
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let mut expected_pc = start_pc;
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// TODO: handle instructions that go past the end of a fetch block
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for (pc, insn) in mock_insns.fetch_block(fetch_pc..fetch_end) {
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for (pc, insn) in mock_insns.fetch_block(start_pc..end_pc) {
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let next_pc = pc + insn.byte_len();
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if pc != expected_pc {
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break;
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@ -226,7 +227,7 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
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WipDecodedInsn {
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fetch_block_id,
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id: next_id.cast_to_static::<UInt<_>>(),
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pc: fetch_pc,
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pc: start_pc,
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size_in_bytes: 0u8.cast_to_static::<UInt<_>>(),
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kind: WipDecodedInsnKind.Interrupt(DEMO_ILLEGAL_INSN_TRAP),
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},
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@ -250,8 +251,9 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
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)
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.await;
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}
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sim.write(from_fetch.inner.ready, queue.len() < FETCH_PIPE_QUEUE_SIZE)
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sim.write(from_fetch.fetch.ready, queue.len() < FETCH_PIPE_QUEUE_SIZE)
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.await;
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sim.write(from_fetch.cancel.ready, true).await;
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sim.wait_for_clock_edge(cd.clk).await;
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if sim.read_past_bool(to_post_decode.inner.ready, cd.clk).await {
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#[hdl(sim)]
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@ -264,25 +266,31 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
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entry.cycles_left = (entry.cycles_left.as_int() - 1u8).to_sim_value();
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}
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}
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if !sim.read_past_bool(from_fetch.inner.ready, cd.clk).await {
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continue;
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}
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// handle cancels before pushing new fetch op
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#[hdl(sim)]
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if let HdlSome(inner) = sim.read_past(from_fetch.inner.data, cd.clk).await {
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#[hdl(sim)]
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let NextPcToFetchInterfaceInner {
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next_fetch_pc,
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fetch_block_id,
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in_progress_fetches_to_cancel,
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} = &inner;
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if let HdlSome(in_progress_fetches_to_cancel) =
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sim.read_past(from_fetch.cancel.data, cd.clk).await
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{
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// cancel in-progress fetches from newest to oldest
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for _ in 0..in_progress_fetches_to_cancel.as_int() {
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for _ in 0..*in_progress_fetches_to_cancel {
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let _ = queue.pop_back();
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}
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}
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if !sim.read_past_bool(from_fetch.fetch.ready, cd.clk).await {
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continue;
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}
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// handle pushing new fetch op after handling cancels
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#[hdl(sim)]
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if let HdlSome(inner) = sim.read_past(from_fetch.fetch.data, cd.clk).await {
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#[hdl(sim)]
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let NextPcToFetchInterfaceInner {
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start_pc,
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fetch_block_id,
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} = &inner;
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queue.push_back(
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#[hdl(sim)]
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FetchPipeQueueEntry {
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fetch_pc: next_fetch_pc,
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start_pc,
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cycles_left: FetchPipeQueueEntry::get_next_delay(delay_sequence_index),
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fetch_block_id,
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},
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