switch to using fayalite version of checked_vcd_output instead of cpu::util
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ebd69089c5
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4 changed files with 6 additions and 155 deletions
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@ -317,152 +317,3 @@ impl LFSR31 {
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state
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}
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}
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pub struct CheckedVcdOutput {
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writer: Option<RcWriter>,
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expected_path: PathBuf,
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expected_contents: Result<String, (Option<PathBuf>, std::io::Error)>,
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location: &'static Location<'static>,
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}
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impl CheckedVcdOutput {
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#[must_use]
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#[track_caller]
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pub fn new<T: BundleType>(sim: &mut Simulation<T>, expected_path: PathBuf) -> Self {
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let writer = RcWriter::default();
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sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
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Self {
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writer: Some(writer),
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expected_contents: std::fs::read_to_string(&expected_path).map_err(|e| {
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eprintln!(
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"error: failed to read expected VCD from: {}",
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expected_path.display(),
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);
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(std::env::current_dir().ok(), e)
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}),
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expected_path,
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location: Location::caller(),
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}
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}
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#[must_use]
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#[track_caller]
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#[doc(hidden)]
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pub fn __checked_vcd_output_macro_helper<T: BundleType>(
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sim: &mut Simulation<T>,
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cargo_manifest_dir: &'static str,
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path: &'static str,
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) -> Self {
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Self::new(sim, Path::new(cargo_manifest_dir).join(path))
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}
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pub fn with_vcd_output<R>(&self, f: impl FnOnce(&str) -> R) -> R {
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let Some(writer) = &self.writer else {
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unreachable!();
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};
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writer.clone().borrow(|output| {
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let Ok(output) = str::from_utf8(output) else {
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unreachable!("VcdWriter writes valid UTF-8");
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};
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f(output)
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})
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}
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#[track_caller]
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pub fn finish(mut self) {
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let Ok(()) = self.finish_impl(|msg| panic!("{msg}"));
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}
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fn finish_impl<E>(
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&mut self,
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error: impl FnOnce(std::fmt::Arguments<'_>) -> E,
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) -> Result<(), E> {
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let Self {
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writer: Some(writer),
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expected_path,
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expected_contents,
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location,
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} = self
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else {
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// already finished
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return Ok(());
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};
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let Ok(vcd) = String::from_utf8(writer.take()) else {
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unreachable!("VcdWriter writes valid UTF-8");
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};
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let expected_path_d = expected_path.display();
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if expected_contents
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.as_ref()
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.is_ok_and(|expected_contents| *expected_contents == vcd)
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{
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// avoid written output from being split from threads interleaving writes to stdout
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let _stdout = std::io::stderr().lock();
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// use println to get output captured by tests
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println!("\n{location}: generated VCD matches the expected VCD in {expected_path_d}");
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return Ok(());
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}
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// avoid written output from being split from threads interleaving writes to stderr
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let _stderr = std::io::stderr().lock();
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let error = |msg: std::fmt::Arguments<'_>| {
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// print msg at both beginning and end so it's easier to find when the vcd is huge
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Err(error(format_args!(
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"\n{msg}####### VCD:\n{vcd}\n#######\n{msg}"
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)))
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};
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let error = |msg: std::fmt::Arguments<'_>| match &*expected_contents {
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Ok(_) => error(format_args!(
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"{location}: generated VCD doesn't match the expected VCD in {expected_path_d}\n\
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{msg}",
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)),
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Err((Some(current_dir), e)) => error(format_args!(
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"{location}: generated VCD doesn't match the expected VCD in {expected_path_d}\n\
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error: failed to read: {e}\n\
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current dir: {current_dir}\n\
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{msg}",
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current_dir = current_dir.display(),
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)),
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Err((None, e)) => error(format_args!(
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"{location}: generated VCD doesn't match the expected VCD in {expected_path_d}\n\
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error: failed to read: {e}\n\
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{msg}",
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)),
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};
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const OVERWRITE_VAR_NAME: &str = "OVERWRITE_EXPECTED_VCD";
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const OVERWRITE_VAR_VALUE: &str = "overwrite";
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match std::env::var_os(OVERWRITE_VAR_NAME) {
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Some(v) if v == OVERWRITE_VAR_VALUE => match std::fs::write(&expected_path, &vcd) {
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Ok(()) => error(format_args!(
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"warning: since `{OVERWRITE_VAR_NAME}={OVERWRITE_VAR_VALUE}` is set -- writing the generated VCD to {expected_path_d}\n"
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)),
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Err(e) => error(format_args!(
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"error: since `{OVERWRITE_VAR_NAME}={OVERWRITE_VAR_VALUE}` is set -- tried to write the generated VCD to {expected_path_d}\n\
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error: failed to write: {e}"
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)),
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},
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_ => error(format_args!(
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"note: rerun the test with the environment variable `{OVERWRITE_VAR_NAME}={OVERWRITE_VAR_VALUE}`\n\
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to update the expected output to match the generated output.\n"
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)),
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}
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}
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}
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impl Drop for CheckedVcdOutput {
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#[track_caller]
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fn drop(&mut self) {
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let _ = self.finish_impl(|msg| {
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if std::thread::panicking() {
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eprintln!("{msg}"); // use eprintln to get output captured by tests
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} else {
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panic!("{msg}");
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}
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});
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}
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}
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#[macro_export]
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macro_rules! checked_vcd_output {
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($sim:expr, $path_relative_to_manifest_dir:expr $(,)?) => {
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$crate::util::CheckedVcdOutput::__checked_vcd_output_macro_helper(
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$sim,
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::std::env!("CARGO_MANIFEST_DIR"),
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::std::concat!($path_relative_to_manifest_dir),
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)
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};
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}
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@ -2,7 +2,6 @@
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// See Notices.txt for copyright information
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use cpu::{
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checked_vcd_output,
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config::{
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CpuConfig, CpuConfigFetchWidth, CpuConfigMaxUnitMaxInFlight, PhantomConstCpuConfig,
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UnitConfig,
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@ -29,6 +28,7 @@ use cpu::{
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};
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use fayalite::{
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bundle::BundleType,
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checked_vcd_output,
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module::instance_with_loc,
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prelude::*,
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ty::{OpaqueSimValue, StaticType},
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@ -3,10 +3,9 @@
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use crate::test_cases::TestCase;
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use cpu::{
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checked_vcd_output, decoder::simple_power_isa::decode_one_insn, instruction::MOp,
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util::array_vec::ArrayVec,
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decoder::simple_power_isa::decode_one_insn, instruction::MOp, util::array_vec::ArrayVec,
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};
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use fayalite::prelude::*;
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use fayalite::{checked_vcd_output, prelude::*};
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use std::{fmt::Write as _, io::Write, process::Command};
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mod test_cases;
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@ -18,6 +18,7 @@ use cpu::{
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util::array_vec::ArrayVec,
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};
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use fayalite::{
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checked_vcd_output,
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firrtl::ExportOptions,
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module::{instance_with_loc, transform::simplify_enums::SimplifyEnumsKind, wire_with_loc},
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prelude::*,
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@ -802,7 +803,7 @@ fn test_power_isa_add_sim() {
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let any_consts = AnyConsts::new();
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let m = check_power_isa_alu_formal(config, cases_add_sub(), Some(any_consts));
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let mut sim = Simulation::new(m);
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let _checked_vcd_output = cpu::checked_vcd_output!(
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let _checked_vcd_output = checked_vcd_output!(
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&mut sim,
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"tests/expected/units_formal_power_isa_add_sim.vcd",
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);
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@ -847,7 +848,7 @@ fn test_power_isa_paddi_sim() {
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let any_consts = AnyConsts::new();
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let m = check_power_isa_alu_formal(config, cases_add_sub(), Some(any_consts));
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let mut sim = Simulation::new(m);
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let _checked_vcd_output = cpu::checked_vcd_output!(
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let _checked_vcd_output = checked_vcd_output!(
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&mut sim,
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"tests/expected/units_formal_power_isa_paddi_sim.vcd",
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);
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