add TraceAsString around instructions and stuff to make the .vcd files much smaller and easier to read
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This commit is contained in:
Jacob Lifshay 2026-05-13 23:34:24 -07:00
parent 8bee576a2a
commit 0d3c41fa14
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
4 changed files with 35839 additions and 1340471 deletions

View file

@ -87,15 +87,15 @@ impl RandomState {
const START_PC: u64 = 0x0; // match microwatt's reset pc
#[derive(Clone, Debug)]
struct Insn<MOps = Vec<SimValue<self::MOp>>> {
struct Insn<MOps = Vec<SimValue<TraceAsString<self::MOp>>>> {
size_in_bytes: u8,
power_isa: String,
mops: MOps,
}
enum LazyMOps {
MOps(Vec<SimValue<self::MOp>>),
Lazy(Box<dyn FnOnce(&[InsnsBuilderLabelState]) -> Vec<SimValue<self::MOp>>>),
MOps(Vec<SimValue<TraceAsString<self::MOp>>>),
Lazy(Box<dyn FnOnce(&[InsnsBuilderLabelState]) -> Vec<SimValue<TraceAsString<self::MOp>>>>),
}
impl Insn<LazyMOps> {
@ -107,7 +107,11 @@ impl Insn<LazyMOps> {
Self {
size_in_bytes,
power_isa,
mops: LazyMOps::MOps(mops.into_iter().map(|mop| mop.into_sim_value()).collect()),
mops: LazyMOps::MOps(
mops.into_iter()
.map(|mop| mop.into_sim_value().into_trace_as_string())
.collect(),
),
}
}
fn new_lazy<I: IntoIterator<Item: ToSimValue<Type = MOp>>>(
@ -121,7 +125,7 @@ impl Insn<LazyMOps> {
mops: LazyMOps::Lazy(Box::new(|labels| {
lazy_mops(labels)
.into_iter()
.map(|mop| mop.into_sim_value())
.map(|mop| mop.into_sim_value().into_trace_as_string())
.collect()
})),
}
@ -772,7 +776,7 @@ impl<'a, C: PhantomConstCpuConfig> MockNextPcState<'a, C> {
};
let mop = &insn.mops[self.next_mop_index];
#[hdl(sim)]
if let MOp::AluBranch(mop) = mop {
if let MOp::AluBranch(mop) = mop.inner() {
#[hdl(sim)]
match mop {
AluBranchMOp::<_, _>::Branch(mop) => {
@ -1043,7 +1047,8 @@ type SimOnlyMemoryChunk = SimOnly<MemoryChunk>;
struct MockMemoryDebugState<C: PhantomConstGet<()> = PhantomConst<()>> {
wrote_output: Bool,
memory: ArrayType<SimOnlyMemoryChunk, MockMemoryDebugStateMemorySize<C>>,
l1_cache: Array<HdlOption<MockCacheLineDebugState>, { MockMemory::CACHE_LINE_COUNT }>,
l1_cache:
Array<TraceAsString<HdlOption<MockCacheLineDebugState>>, { MockMemory::CACHE_LINE_COUNT }>,
}
#[derive(Debug, Clone)]
@ -1291,6 +1296,7 @@ impl MockMemory {
#[hdl(sim)]
HdlNone()
}
.into_trace_as_string()
}),
}
}
@ -1298,16 +1304,16 @@ impl MockMemory {
fn run_mop<C: PhantomConstCpuConfig>(
&mut self,
mop: &SimValue<MOpInstance<LoadStoreMOp<PRegNum<C>, PRegNum<C>>>>,
src_values: &[SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
is_speculative: bool,
) -> Result<SimValue<PRegValue>, AddressCantBeSpeculativelyAccessed> {
) -> Result<SimValue<TraceAsString<PRegValue>>, AddressCantBeSpeculativelyAccessed> {
println!("MockMemory::run_mop: {:#x}: {:?}", mop.pc.as_int(), mop.mop);
println!(
"<- {}{src_values:?}",
if is_speculative { "(speculative) " } else { "" },
);
let retval = #[hdl(sim)]
match &mop.mop {
match mop.mop.inner() {
LoadStoreMOp::<_, _>::Load(mop) => {
#[hdl(sim)]
let LoadMOp::<_, _> { load_store_common } = mop;
@ -1317,7 +1323,7 @@ impl MockMemory {
width,
conversion,
} = load_store_common;
let addr = src_values[0].int_fp.as_int();
let addr = src_values[0].inner().int_fp.as_int();
let loaded = #[hdl(sim)]
match conversion {
LoadStoreConversion::ZeroExt =>
@ -1372,8 +1378,8 @@ impl MockMemory {
width,
conversion,
} = load_store_common;
let addr = src_values[0].int_fp.as_int();
let value = src_values[1].int_fp.as_int();
let addr = src_values[0].inner().int_fp.as_int();
let value = src_values[1].inner().int_fp.as_int();
#[hdl(sim)]
match conversion {
LoadStoreConversion::ZeroExt | LoadStoreConversion::SignExt =>
@ -1399,7 +1405,7 @@ impl MockMemory {
}
};
println!("-> {retval:?}");
Ok(retval)
Ok(retval.into_trace_as_string())
}
}
@ -1413,8 +1419,8 @@ trait MockExecutionStateTrait: Default {
&mut self,
pc: u64,
mop: &SimValue<AddSubMOp<PRegNum<C>, PRegNum<C>, SrcCount>>,
src_values: &[SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
) -> SimValue<PRegValue> {
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
) -> SimValue<TraceAsString<PRegValue>> {
#[hdl(sim)]
let AddSubMOp::<_, _, _> {
alu_common,
@ -1447,10 +1453,11 @@ trait MockExecutionStateTrait: Default {
let pc_or_zero = if **add_pc { pc } else { 0 };
let [src0, src1, src2] = src_values;
let int_fp = src0
.inner()
.int_fp
.as_int()
.wrapping_add(src1.int_fp.as_int())
.wrapping_add(src2.int_fp.as_int())
.wrapping_add(src1.inner().int_fp.as_int())
.wrapping_add(src2.inner().int_fp.as_int())
.wrapping_add(SimValue::value(imm).cast_to_static::<UInt<64>>().as_int())
.wrapping_add(pc_or_zero);
let int_fp = #[hdl(sim)]
@ -1467,18 +1474,19 @@ trait MockExecutionStateTrait: Default {
OutputIntegerMode::ZeroExt8 => int_fp as u8 as u64,
OutputIntegerMode::SignExt8 => int_fp as i8 as u64,
};
#[hdl(sim)]
let retval = #[hdl(sim)]
PRegValue {
int_fp,
flags: PRegFlags::zeroed_sim(), // TODO: compute flags
}
};
retval.into_trace_as_string()
}
#[hdl]
fn run_compare<C: PhantomConstCpuConfig, SrcCount: KnownSize>(
&mut self,
mop: &SimValue<CompareMOp<PRegNum<C>, PRegNum<C>, SrcCount>>,
src_values: &[SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
) -> SimValue<PRegValue> {
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
) -> SimValue<TraceAsString<PRegValue>> {
#[hdl(sim)]
let CompareMOp::<_, _, _> {
common,
@ -1493,13 +1501,16 @@ trait MockExecutionStateTrait: Default {
} = common;
let (lhs, rhs) = match SrcCount::VALUE {
1 => (
src_values[0].int_fp.as_int(),
src_values[0].inner().int_fp.as_int(),
SimValue::value(imm).cast_to_static::<UInt<64>>().as_int(),
),
2 => (src_values[0].int_fp.as_int(), src_values[1].int_fp.as_int()),
2 => (
src_values[0].inner().int_fp.as_int(),
src_values[1].inner().int_fp.as_int(),
),
_ => todo!(),
};
let ordering_to_result = |v: Ordering| -> SimValue<PRegValue> {
let ordering_to_result = |v: Ordering| -> SimValue<TraceAsString<PRegValue>> {
let mut retval = #[hdl(sim)]
PRegValue {
int_fp: 0u64,
@ -1511,7 +1522,7 @@ trait MockExecutionStateTrait: Default {
Ordering::Equal => **flags.cr_eq = true,
Ordering::Greater => **flags.cr_gt = true,
}
retval
retval.into_trace_as_string()
};
#[hdl(sim)]
match compare_mode {
@ -1537,10 +1548,10 @@ trait MockExecutionStateTrait: Default {
fallthrough_pc: u64,
predicted_next_pc: u64,
mop: &SimValue<BranchMOp<PRegNum<C>, PRegNum<C>, SrcCount>>,
src_values: &[SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
config: C,
) -> (
SimValue<PRegValue>,
SimValue<TraceAsString<PRegValue>>,
SimValue<NextPcPredictorOp<C>>,
Option<SimValue<UnitCausedCancel<C>>>,
) {
@ -1577,7 +1588,7 @@ trait MockExecutionStateTrait: Default {
} else {
true
};
let src0_flags = PRegFlags::view_sim_ref::<PRegFlagsPowerISA>(&src0.flags);
let src0_flags = PRegFlags::view_sim_ref::<PRegFlagsPowerISA>(&src0.inner().flags);
let src0_cond = #[hdl(sim)]
match src0_cond_mode {
ConditionMode::Eq => **src0_flags.cr_eq,
@ -1592,6 +1603,7 @@ trait MockExecutionStateTrait: Default {
let src0_cond = src0_cond ^ **invert_src0_cond;
let pc_or_zero = if **pc_relative { pc } else { 0 };
let target_pc = src1
.inner()
.int_fp
.as_int()
.wrapping_add(SimValue::value(imm).cast_to_static::<UInt<64>>().as_int())
@ -1615,12 +1627,13 @@ trait MockExecutionStateTrait: Default {
} else {
None
};
let fallthrough_pc_value = #[hdl(sim)]
PRegValue {
int_fp: fallthrough_pc,
flags: PRegFlags::zeroed_sim(),
};
(
#[hdl(sim)]
PRegValue {
int_fp: fallthrough_pc,
flags: PRegFlags::zeroed_sim(),
},
fallthrough_pc_value.into_trace_as_string(),
#[hdl(sim)]
NextPcPredictorOp::<_> {
call_stack_op: if **is_ret {
@ -1649,10 +1662,13 @@ trait MockExecutionStateTrait: Default {
fn run_mop<C: PhantomConstCpuConfig>(
&mut self,
mop: &SimValue<MOpInstance<RenamedMOp<C>>>,
src_values: &[SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
config: C,
) -> (
Option<(SimValue<PRegValue>, SimValue<NextPcPredictorOp<C>>)>,
Option<(
SimValue<TraceAsString<PRegValue>>,
SimValue<NextPcPredictorOp<C>>,
)>,
Option<SimValue<UnitCausedCancel<C>>>,
) {
#[hdl(sim)]
@ -1680,7 +1696,7 @@ trait MockExecutionStateTrait: Default {
}
};
#[hdl(sim)]
match mop {
match mop.inner() {
UnitMOp::<_, _, _>::AluBranch(mop) =>
{
#[hdl(sim)]
@ -1780,7 +1796,7 @@ impl MockExecutionStateTrait for () {
#[hdl(no_static)]
struct MockUnitOpDebugState<C: PhantomConstGet<CpuConfig>> {
mop: MOpInstance<RenamedMOp<C>>,
src_values: Array<PRegValue, { COMMON_MOP_SRC_LEN }>,
src_values: Array<TraceAsString<PRegValue>, { COMMON_MOP_SRC_LEN }>,
sent_cant_cause_cancel: Bool,
output_ready: HdlOption<UnitOutputReady<C>>,
caused_cancel: HdlOption<UnitCausedCancel<C>>,
@ -1790,7 +1806,7 @@ struct MockUnitOpDebugState<C: PhantomConstGet<CpuConfig>> {
#[derive(Debug)]
struct MockUnitOp<C: PhantomConstCpuConfig> {
mop: SimValue<MOpInstance<RenamedMOp<C>>>,
src_values: [SimValue<PRegValue>; COMMON_MOP_SRC_LEN],
src_values: [SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
sent_cant_cause_cancel: bool,
output_ready: Option<SimValue<UnitOutputReady<C>>>,
caused_cancel: Option<SimValue<UnitCausedCancel<C>>>,
@ -1999,7 +2015,7 @@ impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
config: _,
} = inputs_ready;
assert_eq!(
UnitNum::index_sim(&MOpTrait::dest_reg_sim_ref(&mop.mop).unit_num),
UnitNum::index_sim(&MOpTrait::dest_reg_sim_ref(mop.mop.inner()).unit_num),
Some(self.unit_index),
);
let mut op = MockUnitOp {
@ -2225,8 +2241,8 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
#[hdl(no_static)]
struct MockL2RegFileOpDebugState<C: PhantomConstGet<CpuConfig>> {
mop: MOpInstance<L2RegisterFileMOp<PRegNum<C>, PRegNum<C>>>,
src_values: HdlOption<Array<PRegValue, { COMMON_MOP_SRC_LEN }>>,
dest_value: HdlOption<PRegValue>,
src_values: HdlOption<Array<TraceAsString<PRegValue>, { COMMON_MOP_SRC_LEN }>>,
dest_value: HdlOption<TraceAsString<PRegValue>>,
sent_cant_cause_cancel: Bool,
sent_output_ready: Bool,
config: C,
@ -2235,8 +2251,8 @@ struct MockL2RegFileOpDebugState<C: PhantomConstGet<CpuConfig>> {
#[derive(Debug)]
struct MockL2RegFileOp<C: PhantomConstCpuConfig> {
mop: SimValue<MOpInstance<L2RegisterFileMOp<PRegNum<C>, PRegNum<C>>>>,
src_values: Option<[SimValue<PRegValue>; COMMON_MOP_SRC_LEN]>,
dest_value: Option<SimValue<PRegValue>>,
src_values: Option<[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN]>,
dest_value: Option<SimValue<TraceAsString<PRegValue>>>,
sent_cant_cause_cancel: bool,
sent_output_ready: bool,
config: C,
@ -2274,13 +2290,13 @@ type L2RegFileSize<C: PhantomConstGet<CpuConfig>> = DynSize;
#[hdl(no_static)]
struct MockL2RegFileUnitDebugState<C: PhantomConstGet<CpuConfig>> {
ops: ArrayVec<MockL2RegFileOpDebugState<C>, CpuConfigMaxUnitMaxInFlight<C>>,
l2_regs: ArrayType<PRegValue, L2RegFileSize<C>>,
l2_regs: ArrayType<TraceAsString<PRegValue>, L2RegFileSize<C>>,
config: C,
}
struct MockL2RegFileUnitState<C: PhantomConstCpuConfig> {
ops: VecDeque<MockL2RegFileOp<C>>,
l2_regs: Box<[SimValue<PRegValue>]>,
l2_regs: Box<[SimValue<TraceAsString<PRegValue>>]>,
config: C,
}
@ -2288,7 +2304,8 @@ impl<C: PhantomConstCpuConfig> MockL2RegFileUnitState<C> {
fn new(config: C) -> Self {
Self {
ops: VecDeque::new(),
l2_regs: vec![PRegValue::zeroed_sim(); L2RegFileSize[config]].into_boxed_slice(),
l2_regs: vec![PRegValue::zeroed_sim().into_trace_as_string(); L2RegFileSize[config]]
.into_boxed_slice(),
config,
}
}
@ -2346,7 +2363,7 @@ impl<C: PhantomConstCpuConfig> MockL2RegFileUnitState<C> {
config: _,
} = op;
#[hdl(sim)]
match &mop.mop {
match mop.mop.inner() {
L2RegisterFileMOp::<_, _>::ReadL2Reg(mop) => {
#[hdl(sim)]
let ReadL2RegMOp::<_, _> { common } = mop;
@ -2361,7 +2378,7 @@ impl<C: PhantomConstCpuConfig> MockL2RegFileUnitState<C> {
&& dest_value.is_none()
{
self.l2_regs[L2RegNum::value_sim(&common.imm)] = src_values[0].clone();
*dest_value = Some(PRegValue::zeroed_sim());
*dest_value = Some(PRegValue::zeroed_sim().into_trace_as_string());
}
if dest_value.is_none() {
// we can't run following reads yet.
@ -2387,7 +2404,7 @@ impl<C: PhantomConstCpuConfig> MockL2RegFileUnitState<C> {
mop,
} = mop;
let mop = #[hdl(sim)]
match &mop {
match mop.inner() {
RenamedMOp::<_>::TransformedMove(mop) => mop,
_ => {
panic!("MockL2RegFileUnitState can only handle L2RegisterFile MOps, got: {mop:#?}");
@ -2402,7 +2419,7 @@ impl<C: PhantomConstCpuConfig> MockL2RegFileUnitState<C> {
size_in_bytes,
is_first_mop_in_insn,
is_last_mop_in_insn,
mop,
mop: mop.into_trace_as_string(),
};
self.ops.push_back(MockL2RegFileOp {
mop,
@ -2767,8 +2784,8 @@ fn mock_l2_reg_file_unit(config: PhantomConst<CpuConfig>, unit_index: usize) {
struct MockLoadStoreOpDebugState<C: PhantomConstGet<CpuConfig>> {
mop: MOpInstance<LoadStoreMOp<PRegNum<C>, PRegNum<C>>>,
is_speculative: Bool,
src_values: HdlOption<Array<PRegValue, { COMMON_MOP_SRC_LEN }>>,
dest_value: HdlOption<PRegValue>,
src_values: HdlOption<Array<TraceAsString<PRegValue>, { COMMON_MOP_SRC_LEN }>>,
dest_value: HdlOption<TraceAsString<PRegValue>>,
ran_nonspeculatively: Bool,
sent_cant_cause_cancel: Bool,
sent_output_ready: Bool,
@ -2779,8 +2796,8 @@ struct MockLoadStoreOpDebugState<C: PhantomConstGet<CpuConfig>> {
struct MockLoadStoreOp<C: PhantomConstCpuConfig> {
mop: SimValue<MOpInstance<LoadStoreMOp<PRegNum<C>, PRegNum<C>>>>,
is_speculative: bool,
src_values: Option<[SimValue<PRegValue>; COMMON_MOP_SRC_LEN]>,
dest_value: Option<SimValue<PRegValue>>,
src_values: Option<[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN]>,
dest_value: Option<SimValue<TraceAsString<PRegValue>>>,
ran_nonspeculatively: bool,
sent_cant_cause_cancel: bool,
sent_output_ready: bool,
@ -2913,7 +2930,7 @@ impl<C: PhantomConstCpuConfig> MockLoadStoreUnitState<C> {
}
}
#[hdl(sim)]
match &mop.mop {
match mop.mop.inner() {
LoadStoreMOp::<_, _>::Load(load_mop) => {
#[hdl(sim)]
let LoadMOp::<_, _> { load_store_common } = load_mop;
@ -2988,7 +3005,7 @@ impl<C: PhantomConstCpuConfig> MockLoadStoreUnitState<C> {
mop,
} = mop;
let mop = #[hdl(sim)]
match &mop {
match mop.inner() {
RenamedMOp::<_>::LoadStore(mop) => mop,
_ => panic!("MockLoadStoreUnitState can only handle LoadStore MOps, got: {mop:#?}"),
};
@ -3001,7 +3018,7 @@ impl<C: PhantomConstCpuConfig> MockLoadStoreUnitState<C> {
size_in_bytes,
is_first_mop_in_insn,
is_last_mop_in_insn,
mop,
mop: mop.into_trace_as_string(),
};
self.ops.push_back(MockLoadStoreOp {
mop,