Jacob Lifshay c16726cee6 fix #[hdl]/#[hdl_module] attributes getting the wrong hygiene when processing #[cfg]s		2024-12-29 00:48:15 -08:00
..
sim/expected	sim: add SimValue and reading/writing more than just a scalar	2024-12-18 01:39:35 -08:00
ui	support #[hdl] type aliases	2024-10-30 20:47:10 -07:00
formal.rs	add module exercising formal verification of memories	2024-12-08 17:13:26 -03:00
hdl_types.rs	support #[hdl] type aliases	2024-10-30 20:47:10 -07:00
module.rs	fix #[hdl]/#[hdl_module] attributes getting the wrong hygiene when processing #[cfg]s	2024-12-29 00:48:15 -08:00
sim.rs	sim: fix sim.write to struct	2024-12-18 20:50:50 -08:00
ui.rs	initial public commit	2024-06-10 23:09:13 -07:00