This website requires JavaScript.
Explore
Help
Register
Sign in
cesar
/
fayalite
Watch
1
Star
0
Fork
You've already forked fayalite
0
forked from
libre-chip/fayalite
Code
Pull requests
Activity
307
commits
6
branches
2
tags
24
MiB
fbe4585578
Commit graph
3 commits
Author
SHA1
Message
Date
Cesar Strauss
e4210a672f
Check copyright header in Rocq files.
...
If we ever add Verilog files, we can "or" both results, I guess.
2025-12-09 07:45:35 -03:00
Jacob Lifshay
259bee39c2
tests/sim: split expected output text into separate files
2024-12-05 18:17:13 -08:00
Jacob Lifshay
053391b010
add script for checking copyright headers
2024-09-22 15:29:28 -07:00