227 commits

Author	SHA1	Message	Date
Jacob Lifshay	8a63ea89d0	WIP adding yosys-nextpnr-xray xilinx fpga toolchain -- blinky works on arty a7 100t (except for inverted reset)	2025-10-15 04:29:00 -07:00
Jacob Lifshay	42e3179a60	change cache directory name to be fayalite-specific	2025-10-15 04:29:00 -07:00
Jacob Lifshay	53ae3ff670	mark create-unix-shell-script as incomplete in CLI	2025-10-15 04:29:00 -07:00
Jacob Lifshay	7af9abfb6f	switch to using new crate::build system	2025-10-15 04:29:00 -07:00
Jacob Lifshay	aacd05378f	WIP converting from cli.rs to build/*.rs	2025-10-15 04:29:00 -07:00
Jacob Lifshay	908ccef674	added automatically-added dependencies; added caching for external jobs	2025-10-15 04:29:00 -07:00
Jacob Lifshay	057670c12a	WIP adding FPGA support -- build module should be complete	2025-10-15 04:29:00 -07:00
Jacob Lifshay	f8ac78abd6	Remove extraneous #[automatically_derived] annotations that are causing warnings as reported by Tobias	2025-10-15 04:17:47 -07:00
Jacob Lifshay	db9b1c202c	add simulator support for sim-only values	2025-09-08 22:19:43 -07:00
Jacob Lifshay	b5b1ee866c	converted to using get_state_part_kinds!	2025-09-05 19:10:06 -07:00
Jacob Lifshay	f0e3aef061	add get_state_part_kinds! macro	2025-09-05 19:07:07 -07:00
Jacob Lifshay	6d36698adf	move public paths of sim::{Compiled,Compiler} to sim::compiler	2025-08-26 19:23:21 -07:00
Jacob Lifshay	e7e831cf00	split out simulator compiler into a separate module	2025-08-26 19:17:21 -07:00
Jacob Lifshay	4008c311bf	format code after switching to edition 2024	2025-08-24 16:35:21 -07:00
Jacob Lifshay	ae7c4be9dc	remove get_many_mut since it was stabilized in std as get_disjoint_mut	2025-08-24 15:53:21 -07:00
Jacob Lifshay	65f9ab32f4	switch to edition 2024	2025-08-24 15:53:21 -07:00
Jacob Lifshay	67e66ac3bd	upgrade to rust 1.89.0	2025-08-24 15:53:21 -07:00
Jacob Lifshay	91e1b619e8	switch to petgraph 0.8.1 now that my PR was merged and released to crates.io	2025-04-09 20:48:40 -07:00
Jacob Lifshay	e2d2d4110b	upgrade hashbrown to 0.15.2	2025-04-09 20:33:21 -07:00
Jacob Lifshay	b1f9706e4e	add custom hasher for testing	2025-04-09 20:27:22 -07:00
Jacob Lifshay	4eda4366c8	check types in debug mode in impl Debug for Expr, helping to catch bugs	2025-04-09 20:23:19 -07:00
Jacob Lifshay	122c08d3cf	add fake which for miri	2025-04-09 20:21:43 -07:00
Jacob Lifshay	b08a747e20	switch to using type aliases for HashMap/HashSet to allow easily switching hashers	2025-04-09 20:17:46 -07:00
Jacob Lifshay	e0c9939147	add test that SimValue can't be interned, since its PartialEq may ignore types	2025-04-09 19:55:09 -07:00
Jacob Lifshay	07725ab489	switch interning to use HashTable rather than HashMap	2025-04-09 19:30:02 -07:00
Jacob Lifshay	36f1b9bbb6	add derive(Debug) to all types that are interned	2025-04-09 19:24:08 -07:00
Jacob Lifshay	9a1b047d2f	change TypeIdMap to not use any unsafe code	2025-04-09 16:25:56 -07:00
Jacob Lifshay	5967e812a2	fix [SU]IntValue's PartialEq for interning ... different widths must make values compare not equal otherwise interning will e.g. substitute a 0x0_u8 for a 0x0_u2	2025-04-08 21:57:56 -07:00
Jacob Lifshay	001fd31451	add UIntInRange[Inclusive][Type]	2025-04-07 18:27:54 -07:00
Jacob Lifshay	57aae7b7fb	implement [de]serializing BaseTypes, SimValues, and support PhantomConst<T> in #[hdl] struct S<T>	2025-04-04 01:04:26 -07:00
Jacob Lifshay	6929352be7	re-export bitvec and add types useful for simulation to the prelude	2025-04-03 16:01:39 -07:00
Jacob Lifshay	62058dc141	fix cargo doc warnings -- convert urls to auto links	2025-04-01 22:22:54 -07:00
Jacob Lifshay	c4b6a0fee6	add support for #[hdl(sim)] enum_ty.Variant(value) and #[hdl(sim)] EnumTy::Variant(value) and non-sim variants too	2025-04-01 22:16:47 -07:00
Jacob Lifshay	9092e45447	fix #[hdl(sim)] match on enums	2025-03-30 01:25:07 -07:00
Jacob Lifshay	a40eaaa2da	expand SimValue support	2025-03-30 00:55:38 -07:00
Jacob Lifshay	5028401a5a	change SimValue to contain and deref to a value and not just contain bits	2025-03-27 23:44:36 -07:00
Jacob Lifshay	e0f978fbb6	silence unused m variable warning in #[hdl_module] with an empty body.	2025-03-27 23:17:28 -07:00
Jacob Lifshay	ec3a61513b	simulator read/write types must be passive	2025-03-27 23:03:44 -07:00
Jacob Lifshay	fdc73b5f3b	add ripple counter test to test simulating alternating circuits and extern modules	2025-03-25 18:56:26 -07:00
Jacob Lifshay	a115585d5a	simulator: allow external module generators to wait for value changes and/or clock edges	2025-03-25 18:26:48 -07:00
Jacob Lifshay	ab9ff4f2db	simplify setting an extern module simulation	2025-03-21 17:08:29 -07:00
Jacob Lifshay	d1bd176b28	implement simulation of extern modules	2025-03-21 01:47:14 -07:00
Jacob Lifshay	920d8d875f	add some missing #[track_caller]	2025-03-19 17:10:51 -07:00
Jacob Lifshay	d453755bb2	add ExprPartialEq/ExprPartialOrd impls for PhantomConst	2025-03-10 19:40:03 -07:00
Jacob Lifshay	450e1004b6	fix using fayalite as a dependency	2025-03-09 23:14:14 -07:00
Jacob Lifshay	c0c5b550bc	add PhantomConst	2025-03-09 21:03:47 -07:00
Jacob Lifshay	2fa0ea6192	make FillInDefaultedGenerics work with Sizes and not just Types	2025-03-09 20:59:21 -07:00
Jacob Lifshay	bd75fdfefd	add efficient prefix-sums and reductions	2025-03-02 23:04:17 -08:00
Jacob Lifshay	50c86e18dc	add Expr<ArrayType<T, Len>>: IntoIterator and Expr<Array<T>>: FromIterator<T>	2025-03-02 18:02:34 -08:00
Jacob Lifshay	3458c21f44	add #[hdl(cmp_eq)] to implement HdlPartialEq automatically	2025-02-16 20:48:16 -08:00