forked from libre-chip/fayalite
122 lines
1.9 KiB
Text
122 lines
1.9 KiB
Text
$timescale 1 ps $end
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$scope module sim_only_connects $end
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$scope struct cd $end
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$var wire 1 tq:(w clk $end
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$var wire 1 FVlgb rst $end
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$upscope $end
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$var string 1 g:xf? inp $end
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$var string 1 [OKKg out1 $end
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$var string 1 9pB-> out2 $end
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$var string 1 8(7-4 out3 $end
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$scope module helper1 $end
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$scope struct cd $end
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$var wire 1 $Kwp\ clk $end
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$var wire 1 nmVq' rst $end
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$upscope $end
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$var string 1 qS)@z inp $end
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$var string 1 ~je// out $end
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$upscope $end
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$var string 1 CyjVm delay1 $end
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$var reg 1 z~g{\ delay1_empty $end
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$scope module helper2 $end
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$scope struct cd $end
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$var wire 1 Ph.=# clk $end
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$var wire 1 !GXK\ rst $end
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$upscope $end
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$var string 1 /YVv: inp $end
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$var string 1 Kk*{# out $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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$dumpvars
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0tq:(w
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1FVlgb
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s{\"extra\":\x20\"value\"} g:xf?
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s{} [OKKg
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s{} 9pB->
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s{} 8(7-4
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0$Kwp\
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1nmVq'
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s{} qS)@z
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s{} ~je//
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s{} CyjVm
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0z~g{\
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0Ph.=#
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1!GXK\
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s{} /YVv:
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s{} Kk*{#
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$end
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#1000000
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1tq:(w
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s{\"extra\":\x20\"value\"} [OKKg
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1$Kwp\
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s{\"extra\":\x20\"value\"} qS)@z
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1z~g{\
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1Ph.=#
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s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 9pB->
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s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} ~je//
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s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} /YVv:
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s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 8(7-4
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s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} Kk*{#
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#2000000
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0tq:(w
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0FVlgb
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0$Kwp\
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0nmVq'
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0Ph.=#
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0!GXK\
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#3000000
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1tq:(w
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1$Kwp\
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s{\"extra\":\x20\"value\"} CyjVm
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0z~g{\
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1Ph.=#
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#4000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#5000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#6000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#7000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#8000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#9000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#10000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#11000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#12000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#13000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#14000000
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0tq:(w
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0$Kwp\
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0Ph.=#
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#15000000
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1tq:(w
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1$Kwp\
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1Ph.=#
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#16000000
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