forked from libre-chip/fayalite
2152 lines
No EOL
93 KiB
Text
2152 lines
No EOL
93 KiB
Text
Simulation {
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state: State {
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insns: Insns {
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state_layout: StateLayout {
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ty: TypeLayout {
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small_slots: StatePartLayout<SmallSlots> {
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len: 18,
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debug_data: [
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|
SlotDebugData {
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name: "",
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|
ty: Enum {
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|
HdlNone,
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|
HdlSome,
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|
},
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Enum {
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|
HdlNone,
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|
HdlSome,
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|
},
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
|
|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
|
|
SlotDebugData {
|
|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
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|
ty: UInt<1>,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: UInt<1>,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: UInt<1>,
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|
},
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|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
|
|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
|
|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
|
|
SlotDebugData {
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|
name: "",
|
|
ty: Bool,
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|
},
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|
SlotDebugData {
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name: "",
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ty: Bool,
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},
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],
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..
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},
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big_slots: StatePartLayout<BigSlots> {
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len: 72,
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debug_data: [
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::cd.clk",
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ty: Clock,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::cd.rst",
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ty: SyncReset,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::inp.data",
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ty: Enum {
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HdlNone,
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HdlSome(UInt<8>),
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},
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::inp.ready",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::out.data",
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ty: Enum {
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HdlNone,
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HdlSome(UInt<8>),
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},
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::out.ready",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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|
SlotDebugData {
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name: "",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::count",
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ty: UInt<2>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::r0.addr",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::r0.en",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::r0.clk",
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ty: Clock,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::r0.data",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::w1.addr",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::w1.en",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::w1.clk",
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ty: Clock,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::w1.data",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::mem::w1.mask",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::inp_index_reg",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::out_index_reg",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::out_index_reg$next",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::maybe_full_reg",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::inp_firing",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::firing",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::out_firing",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::firing",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::indexes_equal",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::empty",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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|
SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::full",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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|
SlotDebugData {
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name: "",
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ty: Bool,
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},
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|
SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out",
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ty: UInt<8>,
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},
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|
SlotDebugData {
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name: "",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: ".0",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: ".1",
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ty: UInt<8>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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SlotDebugData {
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name: "",
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ty: Enum {
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HdlNone,
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HdlSome(UInt<8>),
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},
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},
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SlotDebugData {
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name: "",
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ty: UInt<9>,
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},
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SlotDebugData {
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name: "",
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ty: Enum {
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HdlNone,
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HdlSome(UInt<8>),
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},
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<64>,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<0>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: Bool,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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|
SlotDebugData {
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name: "",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<64>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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SlotDebugData {
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name: "InstantiatedModule(queue: queue).queue::count_lower",
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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SlotDebugData {
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name: "",
|
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ty: UInt<1>,
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},
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SlotDebugData {
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name: "",
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ty: UInt<2>,
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},
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],
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..
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},
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sim_only_slots: StatePartLayout<SimOnlySlots> {
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len: 0,
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debug_data: [],
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layout_data: [],
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..
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},
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},
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memories: StatePartLayout<Memories> {
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len: 1,
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debug_data: [
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(),
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],
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layout_data: [
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MemoryData {
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array_type: Array<UInt<8>, 2>,
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data: [
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// len = 0x2
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[0x0]: 0x00,
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[0x1]: 0x00,
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],
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},
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],
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..
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},
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},
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insns: [
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// at: ready_valid.rs:64:1
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0: SubU {
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dest: StatePartIndex<BigSlots>(69), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
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lhs: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
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rhs: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
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dest_width: 2,
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},
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1: CastToUInt {
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dest: StatePartIndex<BigSlots>(70), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
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src: StatePartIndex<BigSlots>(69), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
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dest_width: 1,
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},
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// at: ready_valid.rs:178:13
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2: Copy {
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dest: StatePartIndex<BigSlots>(68), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count_lower", ty: UInt<1> },
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src: StatePartIndex<BigSlots>(70), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
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},
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// at: ready_valid.rs:64:1
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3: CastToUInt {
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dest: StatePartIndex<BigSlots>(71), // (0x1) SlotDebugData { name: "", ty: UInt<2> },
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src: StatePartIndex<BigSlots>(68), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count_lower", ty: UInt<1> },
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dest_width: 2,
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},
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4: Const {
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dest: StatePartIndex<BigSlots>(65), // (0x2) SlotDebugData { name: "", ty: UInt<64> },
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value: 0x2,
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},
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5: CastToUInt {
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dest: StatePartIndex<BigSlots>(66), // (0x2) SlotDebugData { name: "", ty: UInt<2> },
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src: StatePartIndex<BigSlots>(65), // (0x2) SlotDebugData { name: "", ty: UInt<64> },
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dest_width: 2,
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},
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6: Const {
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dest: StatePartIndex<BigSlots>(58), // (0x0) SlotDebugData { name: "", ty: UInt<0> },
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value: 0x0,
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},
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7: CastToUInt {
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dest: StatePartIndex<BigSlots>(59), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
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src: StatePartIndex<BigSlots>(58), // (0x0) SlotDebugData { name: "", ty: UInt<0> },
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dest_width: 1,
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},
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8: CastToUInt {
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dest: StatePartIndex<BigSlots>(67), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
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src: StatePartIndex<BigSlots>(58), // (0x0) SlotDebugData { name: "", ty: UInt<0> },
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dest_width: 2,
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},
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9: Const {
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dest: StatePartIndex<BigSlots>(56), // (0x1) SlotDebugData { name: "", ty: UInt<64> },
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value: 0x1,
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},
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10: CmpEq {
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dest: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "", ty: Bool },
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lhs: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
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rhs: StatePartIndex<BigSlots>(56), // (0x1) SlotDebugData { name: "", ty: UInt<64> },
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},
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|
11: CmpEq {
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dest: StatePartIndex<BigSlots>(62), // (0x1) SlotDebugData { name: "", ty: Bool },
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lhs: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
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rhs: StatePartIndex<BigSlots>(56), // (0x1) SlotDebugData { name: "", ty: UInt<64> },
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},
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|
12: Const {
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dest: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "", ty: UInt<9> },
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value: 0x0,
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},
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13: Copy {
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|
dest: StatePartIndex<BigSlots>(54), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
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src: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "", ty: UInt<9> },
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|
},
|
|
14: Const {
|
|
dest: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
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value: 0x1,
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|
},
|
|
15: Add {
|
|
dest: StatePartIndex<BigSlots>(60), // (0x1) SlotDebugData { name: "", ty: UInt<2> },
|
|
lhs: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
rhs: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
16: CastToUInt {
|
|
dest: StatePartIndex<BigSlots>(61), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(60), // (0x1) SlotDebugData { name: "", ty: UInt<2> },
|
|
dest_width: 1,
|
|
},
|
|
17: Add {
|
|
dest: StatePartIndex<BigSlots>(63), // (0x2) SlotDebugData { name: "", ty: UInt<2> },
|
|
lhs: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
rhs: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
18: CastToUInt {
|
|
dest: StatePartIndex<BigSlots>(64), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(63), // (0x2) SlotDebugData { name: "", ty: UInt<2> },
|
|
dest_width: 1,
|
|
},
|
|
19: Const {
|
|
dest: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
|
|
value: 0x0,
|
|
},
|
|
// at: ready_valid.rs:118:30
|
|
20: Copy {
|
|
dest: StatePartIndex<BigSlots>(42), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
|
|
},
|
|
// at: ready_valid.rs:117:5
|
|
21: Copy {
|
|
dest: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.clk", ty: Clock },
|
|
src: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock },
|
|
},
|
|
// at: ready_valid.rs:115:5
|
|
22: Copy {
|
|
dest: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.addr", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:114:5
|
|
23: Copy {
|
|
dest: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.clk", ty: Clock },
|
|
src: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
24: Const {
|
|
dest: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
value: 0x1,
|
|
},
|
|
// at: ready_valid.rs:113:5
|
|
25: Copy {
|
|
dest: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.en", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:119:5
|
|
26: Copy {
|
|
dest: StatePartIndex<BigSlots>(19), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.mask", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:112:5
|
|
27: Copy {
|
|
dest: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.addr", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
28: NotU {
|
|
dest: StatePartIndex<BigSlots>(37), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
width: 1,
|
|
},
|
|
29: CmpEq {
|
|
dest: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
rhs: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:104:5
|
|
30: Copy {
|
|
dest: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
31: And {
|
|
dest: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool },
|
|
rhs: StatePartIndex<BigSlots>(37), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:107:5
|
|
32: Copy {
|
|
dest: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::empty", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
33: NotU {
|
|
dest: StatePartIndex<BigSlots>(45), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::empty", ty: Bool },
|
|
width: 1,
|
|
},
|
|
34: And {
|
|
dest: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool },
|
|
rhs: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:110:5
|
|
35: Copy {
|
|
dest: StatePartIndex<BigSlots>(39), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::full", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
36: NotU {
|
|
dest: StatePartIndex<BigSlots>(44), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(39), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::full", ty: Bool },
|
|
width: 1,
|
|
},
|
|
// at: ready_valid.rs:121:5
|
|
37: Copy {
|
|
dest: StatePartIndex<BigSlots>(3), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(44), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:166:5
|
|
38: BranchIfZero {
|
|
target: 43,
|
|
value: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:168:9
|
|
39: BranchIfZero {
|
|
target: 41,
|
|
value: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:169:13
|
|
40: Copy {
|
|
dest: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<2> },
|
|
src: StatePartIndex<BigSlots>(66), // (0x2) SlotDebugData { name: "", ty: UInt<2> },
|
|
},
|
|
// at: ready_valid.rs:168:9
|
|
41: BranchIfNonZero {
|
|
target: 43,
|
|
value: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:171:13
|
|
42: Copy {
|
|
dest: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<2> },
|
|
src: StatePartIndex<BigSlots>(67), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
|
|
},
|
|
// at: ready_valid.rs:166:5
|
|
43: BranchIfNonZero {
|
|
target: 45,
|
|
value: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:182:13
|
|
44: Copy {
|
|
dest: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<2> },
|
|
src: StatePartIndex<BigSlots>(71), // (0x1) SlotDebugData { name: "", ty: UInt<2> },
|
|
},
|
|
// at: ready_valid.rs:88:26
|
|
45: Copy {
|
|
dest: StatePartIndex<BigSlots>(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
46: Const {
|
|
dest: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
value: 0x0,
|
|
},
|
|
// at: ready_valid.rs:86:25
|
|
47: Copy {
|
|
dest: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:84:31
|
|
48: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(17), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.rst", ty: SyncReset },
|
|
},
|
|
49: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(16), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock },
|
|
},
|
|
50: AndSmall {
|
|
dest: StatePartIndex<SmallSlots>(15), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(16), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: StatePartIndex<SmallSlots>(14), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
51: Copy {
|
|
dest: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
52: Const {
|
|
dest: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
value: 0x0,
|
|
},
|
|
// at: ready_valid.rs:91:19
|
|
53: CastBigToArrayIndex {
|
|
dest: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.addr", ty: UInt<1> },
|
|
},
|
|
54: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(9), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.clk", ty: Clock },
|
|
},
|
|
55: AndSmall {
|
|
dest: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(9), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: StatePartIndex<SmallSlots>(7), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
56: CastBigToArrayIndex {
|
|
dest: StatePartIndex<SmallSlots>(6), // (0x1 1) SlotDebugData { name: "", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.addr", ty: UInt<1> },
|
|
},
|
|
57: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(5), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.en", ty: Bool },
|
|
},
|
|
58: BranchIfSmallZero {
|
|
target: 61,
|
|
value: StatePartIndex<SmallSlots>(5), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
59: MemoryReadUInt {
|
|
dest: StatePartIndex<BigSlots>(14), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> },
|
|
memory: StatePartIndex<Memories>(0), // (MemoryData {
|
|
// array_type: Array<UInt<8>, 2>,
|
|
// data: [
|
|
// // len = 0x2
|
|
// [0x0]: 0x22,
|
|
// [0x1]: 0x23,
|
|
// ],
|
|
// }) (),
|
|
addr: StatePartIndex<SmallSlots>(6), // (0x1 1) SlotDebugData { name: "", ty: UInt<1> },
|
|
stride: 8,
|
|
start: 0,
|
|
width: 8,
|
|
},
|
|
60: Branch {
|
|
target: 62,
|
|
},
|
|
61: Const {
|
|
dest: StatePartIndex<BigSlots>(14), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> },
|
|
value: 0x0,
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
62: Copy {
|
|
dest: StatePartIndex<BigSlots>(46), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
63: Copy {
|
|
dest: StatePartIndex<BigSlots>(47), // (0x23) SlotDebugData { name: ".1", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(14), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> },
|
|
},
|
|
64: Shl {
|
|
dest: StatePartIndex<BigSlots>(49), // (0x46) SlotDebugData { name: "", ty: UInt<9> },
|
|
lhs: StatePartIndex<BigSlots>(47), // (0x23) SlotDebugData { name: ".1", ty: UInt<8> },
|
|
rhs: 1,
|
|
},
|
|
65: Or {
|
|
dest: StatePartIndex<BigSlots>(50), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
lhs: StatePartIndex<BigSlots>(46), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> },
|
|
rhs: StatePartIndex<BigSlots>(49), // (0x46) SlotDebugData { name: "", ty: UInt<9> },
|
|
},
|
|
66: CastToUInt {
|
|
dest: StatePartIndex<BigSlots>(51), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
src: StatePartIndex<BigSlots>(50), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
dest_width: 9,
|
|
},
|
|
67: Copy {
|
|
dest: StatePartIndex<BigSlots>(52), // (0x47) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
src: StatePartIndex<BigSlots>(51), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
},
|
|
// at: ready_valid.rs:130:5
|
|
68: BranchIfZero {
|
|
target: 70,
|
|
value: StatePartIndex<BigSlots>(45), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:131:9
|
|
69: Copy {
|
|
dest: StatePartIndex<BigSlots>(6), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
src: StatePartIndex<BigSlots>(52), // (0x47) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
},
|
|
// at: ready_valid.rs:130:5
|
|
70: BranchIfNonZero {
|
|
target: 72,
|
|
value: StatePartIndex<BigSlots>(45), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:136:13
|
|
71: Copy {
|
|
dest: StatePartIndex<BigSlots>(6), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
src: StatePartIndex<BigSlots>(54), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
},
|
|
// at: ready_valid.rs:91:19
|
|
72: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.clk", ty: Clock },
|
|
},
|
|
73: AndSmall {
|
|
dest: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
74: Copy {
|
|
dest: StatePartIndex<BigSlots>(8), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
src: StatePartIndex<BigSlots>(6), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
},
|
|
75: SliceInt {
|
|
dest: StatePartIndex<BigSlots>(9), // (0x23) SlotDebugData { name: "", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(8), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
start: 1,
|
|
len: 8,
|
|
},
|
|
// at: ready_valid.rs:79:32
|
|
76: AndBigWithSmallImmediate {
|
|
dest: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
lhs: StatePartIndex<BigSlots>(6), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:19:9
|
|
77: BranchIfSmallNeImmediate {
|
|
target: 79,
|
|
lhs: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
rhs: 0x0,
|
|
},
|
|
// at: ready_valid.rs:20:24
|
|
78: Copy {
|
|
dest: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:19:9
|
|
79: BranchIfSmallNeImmediate {
|
|
target: 81,
|
|
lhs: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:21:27
|
|
80: Copy {
|
|
dest: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.ready", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:101:5
|
|
81: Copy {
|
|
dest: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:156:5
|
|
82: BranchIfZero {
|
|
target: 87,
|
|
value: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:158:9
|
|
83: BranchIfZero {
|
|
target: 85,
|
|
value: StatePartIndex<BigSlots>(62), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:159:13
|
|
84: Copy {
|
|
dest: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(59), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:158:9
|
|
85: BranchIfNonZero {
|
|
target: 87,
|
|
value: StatePartIndex<BigSlots>(62), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:161:13
|
|
86: Copy {
|
|
dest: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(64), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
87: Copy {
|
|
dest: StatePartIndex<BigSlots>(4), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
src: StatePartIndex<BigSlots>(2), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
},
|
|
88: SliceInt {
|
|
dest: StatePartIndex<BigSlots>(5), // (0x23) SlotDebugData { name: "", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(4), // (0x47) SlotDebugData { name: "", ty: UInt<9> },
|
|
start: 1,
|
|
len: 8,
|
|
},
|
|
// at: ready_valid.rs:77:32
|
|
89: AndBigWithSmallImmediate {
|
|
dest: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
lhs: StatePartIndex<BigSlots>(2), // (0x47) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:19:9
|
|
90: BranchIfSmallNeImmediate {
|
|
target: 92,
|
|
lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
rhs: 0x0,
|
|
},
|
|
// at: ready_valid.rs:20:24
|
|
91: Copy {
|
|
dest: StatePartIndex<BigSlots>(31), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:19:9
|
|
92: BranchIfSmallNeImmediate {
|
|
target: 94,
|
|
lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:21:27
|
|
93: Copy {
|
|
dest: StatePartIndex<BigSlots>(31), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(3), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:98:5
|
|
94: Copy {
|
|
dest: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(31), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:116:5
|
|
95: Copy {
|
|
dest: StatePartIndex<BigSlots>(16), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.en", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:91:19
|
|
96: IsNonZeroDestIsSmall {
|
|
dest: StatePartIndex<SmallSlots>(10), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(16), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.en", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
97: CmpNe {
|
|
dest: StatePartIndex<BigSlots>(55), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool },
|
|
rhs: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:141:5
|
|
98: BranchIfZero {
|
|
target: 100,
|
|
value: StatePartIndex<BigSlots>(55), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:142:9
|
|
99: Copy {
|
|
dest: StatePartIndex<BigSlots>(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:146:5
|
|
100: BranchIfZero {
|
|
target: 105,
|
|
value: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:148:9
|
|
101: BranchIfZero {
|
|
target: 103,
|
|
value: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:149:13
|
|
102: Copy {
|
|
dest: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(59), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:148:9
|
|
103: BranchIfNonZero {
|
|
target: 105,
|
|
value: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:151:13
|
|
104: Copy {
|
|
dest: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(61), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:118:30
|
|
105: BranchIfSmallNeImmediate {
|
|
target: 107,
|
|
lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
|
|
rhs: 0x1,
|
|
},
|
|
106: Copy {
|
|
dest: StatePartIndex<BigSlots>(42), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(5), // (0x23) SlotDebugData { name: "", ty: UInt<8> },
|
|
},
|
|
// at: ready_valid.rs:118:5
|
|
107: Copy {
|
|
dest: StatePartIndex<BigSlots>(18), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.data", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(42), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> },
|
|
},
|
|
// at: ready_valid.rs:84:31
|
|
108: BranchIfSmallZero {
|
|
target: 113,
|
|
value: StatePartIndex<SmallSlots>(15), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
109: BranchIfSmallNonZero {
|
|
target: 112,
|
|
value: StatePartIndex<SmallSlots>(17), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
110: Copy {
|
|
dest: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<1> },
|
|
},
|
|
111: Branch {
|
|
target: 113,
|
|
},
|
|
112: Copy {
|
|
dest: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:86:25
|
|
113: BranchIfSmallZero {
|
|
target: 118,
|
|
value: StatePartIndex<SmallSlots>(15), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
114: BranchIfSmallNonZero {
|
|
target: 117,
|
|
value: StatePartIndex<SmallSlots>(17), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
115: Copy {
|
|
dest: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<1> },
|
|
},
|
|
116: Branch {
|
|
target: 118,
|
|
},
|
|
117: Copy {
|
|
dest: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<1> },
|
|
src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
// at: ready_valid.rs:88:26
|
|
118: BranchIfSmallZero {
|
|
target: 123,
|
|
value: StatePartIndex<SmallSlots>(15), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
119: BranchIfSmallNonZero {
|
|
target: 122,
|
|
value: StatePartIndex<SmallSlots>(17), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
120: Copy {
|
|
dest: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool },
|
|
},
|
|
121: Branch {
|
|
target: 123,
|
|
},
|
|
122: Copy {
|
|
dest: StatePartIndex<BigSlots>(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
// at: ready_valid.rs:91:19
|
|
123: BranchIfSmallZero {
|
|
target: 124,
|
|
value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
124: BranchIfSmallZero {
|
|
target: 132,
|
|
value: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
125: CopySmall {
|
|
dest: StatePartIndex<SmallSlots>(12), // (0x1 1) SlotDebugData { name: "", ty: UInt<1> },
|
|
src: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<1> },
|
|
},
|
|
126: CopySmall {
|
|
dest: StatePartIndex<SmallSlots>(13), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<SmallSlots>(10), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
127: Copy {
|
|
dest: StatePartIndex<BigSlots>(20), // (0x23) SlotDebugData { name: "", ty: UInt<8> },
|
|
src: StatePartIndex<BigSlots>(18), // (0x23) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.data", ty: UInt<8> },
|
|
},
|
|
128: Copy {
|
|
dest: StatePartIndex<BigSlots>(21), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
src: StatePartIndex<BigSlots>(19), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.mask", ty: Bool },
|
|
},
|
|
129: BranchIfSmallZero {
|
|
target: 132,
|
|
value: StatePartIndex<SmallSlots>(13), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
130: BranchIfZero {
|
|
target: 132,
|
|
value: StatePartIndex<BigSlots>(21), // (0x1) SlotDebugData { name: "", ty: Bool },
|
|
},
|
|
131: MemoryWriteUInt {
|
|
value: StatePartIndex<BigSlots>(20), // (0x23) SlotDebugData { name: "", ty: UInt<8> },
|
|
memory: StatePartIndex<Memories>(0), // (MemoryData {
|
|
// array_type: Array<UInt<8>, 2>,
|
|
// data: [
|
|
// // len = 0x2
|
|
// [0x0]: 0x22,
|
|
// [0x1]: 0x23,
|
|
// ],
|
|
// }) (),
|
|
addr: StatePartIndex<SmallSlots>(12), // (0x1 1) SlotDebugData { name: "", ty: UInt<1> },
|
|
stride: 8,
|
|
start: 0,
|
|
width: 8,
|
|
},
|
|
132: XorSmallImmediate {
|
|
dest: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: 0x1,
|
|
},
|
|
133: XorSmallImmediate {
|
|
dest: StatePartIndex<SmallSlots>(7), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(9), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:84:31
|
|
134: XorSmallImmediate {
|
|
dest: StatePartIndex<SmallSlots>(14), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
|
lhs: StatePartIndex<SmallSlots>(16), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
|
rhs: 0x1,
|
|
},
|
|
// at: ready_valid.rs:64:1
|
|
135: Return,
|
|
],
|
|
..
|
|
},
|
|
pc: 135,
|
|
memory_write_log: [],
|
|
memories: StatePart {
|
|
value: [
|
|
MemoryData {
|
|
array_type: Array<UInt<8>, 2>,
|
|
data: [
|
|
// len = 0x2
|
|
[0x0]: 0x22,
|
|
[0x1]: 0x23,
|
|
],
|
|
},
|
|
],
|
|
},
|
|
small_slots: StatePart {
|
|
value: [
|
|
1,
|
|
1,
|
|
1,
|
|
0,
|
|
0,
|
|
1,
|
|
1,
|
|
1,
|
|
0,
|
|
0,
|
|
1,
|
|
0,
|
|
1,
|
|
1,
|
|
1,
|
|
0,
|
|
0,
|
|
0,
|
|
],
|
|
},
|
|
big_slots: StatePart {
|
|
value: [
|
|
0,
|
|
0,
|
|
71,
|
|
1,
|
|
71,
|
|
35,
|
|
71,
|
|
0,
|
|
71,
|
|
35,
|
|
1,
|
|
1,
|
|
1,
|
|
0,
|
|
35,
|
|
0,
|
|
1,
|
|
0,
|
|
35,
|
|
1,
|
|
35,
|
|
1,
|
|
0,
|
|
1,
|
|
0,
|
|
1,
|
|
1,
|
|
1,
|
|
1,
|
|
0,
|
|
1,
|
|
1,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
0,
|
|
1,
|
|
35,
|
|
0,
|
|
1,
|
|
1,
|
|
1,
|
|
35,
|
|
1,
|
|
70,
|
|
71,
|
|
71,
|
|
71,
|
|
0,
|
|
0,
|
|
1,
|
|
1,
|
|
0,
|
|
0,
|
|
0,
|
|
1,
|
|
1,
|
|
1,
|
|
2,
|
|
0,
|
|
2,
|
|
2,
|
|
0,
|
|
1,
|
|
3,
|
|
1,
|
|
1,
|
|
],
|
|
},
|
|
sim_only_slots: StatePart {
|
|
value: [],
|
|
},
|
|
},
|
|
io: Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
},
|
|
main_module: SimulationModuleState {
|
|
base_targets: [
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.cd,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.inp,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.out,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.count,
|
|
],
|
|
uninitialized_ios: {},
|
|
io_targets: {
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.cd,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.cd.clk,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.cd.rst,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.count,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.inp,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.inp.data,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.inp.ready,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.out,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.out.data,
|
|
Instance {
|
|
name: <simulator>::queue,
|
|
instantiated: Module {
|
|
name: queue,
|
|
..
|
|
},
|
|
}.out.ready,
|
|
},
|
|
did_initial_settle: true,
|
|
clocks_for_past: {},
|
|
},
|
|
extern_modules: [],
|
|
trace_decls: TraceModule {
|
|
name: "queue",
|
|
children: [
|
|
TraceModuleIO {
|
|
name: "cd",
|
|
child: TraceBundle {
|
|
name: "cd",
|
|
fields: [
|
|
TraceClock {
|
|
location: TraceScalarId(0),
|
|
name: "clk",
|
|
flow: Source,
|
|
},
|
|
TraceSyncReset {
|
|
location: TraceScalarId(1),
|
|
name: "rst",
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
clk: Clock,
|
|
/* offset = 1 */
|
|
rst: SyncReset,
|
|
},
|
|
flow: Source,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
clk: Clock,
|
|
/* offset = 1 */
|
|
rst: SyncReset,
|
|
},
|
|
flow: Source,
|
|
},
|
|
TraceModuleIO {
|
|
name: "inp",
|
|
child: TraceBundle {
|
|
name: "inp",
|
|
fields: [
|
|
TraceEnumWithFields {
|
|
name: "data",
|
|
discriminant: TraceEnumDiscriminant {
|
|
location: TraceScalarId(2),
|
|
name: "$tag",
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
flow: Source,
|
|
},
|
|
non_empty_fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(3),
|
|
name: "HdlSome",
|
|
ty: UInt<8>,
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
flow: Source,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(4),
|
|
name: "ready",
|
|
flow: Sink,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
data: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
#[hdl(flip)] /* offset = 9 */
|
|
ready: Bool,
|
|
},
|
|
flow: Source,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
data: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
#[hdl(flip)] /* offset = 9 */
|
|
ready: Bool,
|
|
},
|
|
flow: Source,
|
|
},
|
|
TraceModuleIO {
|
|
name: "out",
|
|
child: TraceBundle {
|
|
name: "out",
|
|
fields: [
|
|
TraceEnumWithFields {
|
|
name: "data",
|
|
discriminant: TraceEnumDiscriminant {
|
|
location: TraceScalarId(5),
|
|
name: "$tag",
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
flow: Sink,
|
|
},
|
|
non_empty_fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(6),
|
|
name: "HdlSome",
|
|
ty: UInt<8>,
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(7),
|
|
name: "ready",
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
data: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
#[hdl(flip)] /* offset = 9 */
|
|
ready: Bool,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
data: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
#[hdl(flip)] /* offset = 9 */
|
|
ready: Bool,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
TraceModuleIO {
|
|
name: "count",
|
|
child: TraceUInt {
|
|
location: TraceScalarId(8),
|
|
name: "count",
|
|
ty: UInt<2>,
|
|
flow: Sink,
|
|
},
|
|
ty: UInt<2>,
|
|
flow: Sink,
|
|
},
|
|
TraceMem {
|
|
id: TraceMemoryId(0),
|
|
name: "mem",
|
|
stride: 8,
|
|
element_type: TraceUInt {
|
|
location: TraceMemoryLocation {
|
|
id: TraceMemoryId(0),
|
|
depth: 2,
|
|
stride: 8,
|
|
start: 0,
|
|
len: 8,
|
|
},
|
|
name: "mem",
|
|
ty: UInt<8>,
|
|
flow: Duplex,
|
|
},
|
|
ports: [
|
|
TraceMemPort {
|
|
name: "r0",
|
|
bundle: TraceBundle {
|
|
name: "r0",
|
|
fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(9),
|
|
name: "addr",
|
|
ty: UInt<1>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(10),
|
|
name: "en",
|
|
flow: Sink,
|
|
},
|
|
TraceClock {
|
|
location: TraceScalarId(11),
|
|
name: "clk",
|
|
flow: Sink,
|
|
},
|
|
TraceUInt {
|
|
location: TraceScalarId(12),
|
|
name: "data",
|
|
ty: UInt<8>,
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
#[hdl(flip)] /* offset = 3 */
|
|
data: UInt<8>,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
#[hdl(flip)] /* offset = 3 */
|
|
data: UInt<8>,
|
|
},
|
|
},
|
|
TraceMemPort {
|
|
name: "w1",
|
|
bundle: TraceBundle {
|
|
name: "w1",
|
|
fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(13),
|
|
name: "addr",
|
|
ty: UInt<1>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(14),
|
|
name: "en",
|
|
flow: Sink,
|
|
},
|
|
TraceClock {
|
|
location: TraceScalarId(15),
|
|
name: "clk",
|
|
flow: Sink,
|
|
},
|
|
TraceUInt {
|
|
location: TraceScalarId(16),
|
|
name: "data",
|
|
ty: UInt<8>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(17),
|
|
name: "mask",
|
|
flow: Sink,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
/* offset = 3 */
|
|
data: UInt<8>,
|
|
/* offset = 11 */
|
|
mask: Bool,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
/* offset = 3 */
|
|
data: UInt<8>,
|
|
/* offset = 11 */
|
|
mask: Bool,
|
|
},
|
|
},
|
|
],
|
|
array_type: Array<UInt<8>, 2>,
|
|
},
|
|
TraceReg {
|
|
name: "inp_index_reg",
|
|
child: TraceUInt {
|
|
location: TraceScalarId(18),
|
|
name: "inp_index_reg",
|
|
ty: UInt<1>,
|
|
flow: Duplex,
|
|
},
|
|
ty: UInt<1>,
|
|
},
|
|
TraceReg {
|
|
name: "out_index_reg",
|
|
child: TraceUInt {
|
|
location: TraceScalarId(19),
|
|
name: "out_index_reg",
|
|
ty: UInt<1>,
|
|
flow: Duplex,
|
|
},
|
|
ty: UInt<1>,
|
|
},
|
|
TraceReg {
|
|
name: "maybe_full_reg",
|
|
child: TraceBool {
|
|
location: TraceScalarId(20),
|
|
name: "maybe_full_reg",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "inp_firing",
|
|
child: TraceBool {
|
|
location: TraceScalarId(21),
|
|
name: "inp_firing",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "firing",
|
|
child: TraceBool {
|
|
location: TraceScalarId(22),
|
|
name: "firing",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "out_firing",
|
|
child: TraceBool {
|
|
location: TraceScalarId(23),
|
|
name: "out_firing",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "firing",
|
|
child: TraceBool {
|
|
location: TraceScalarId(24),
|
|
name: "firing",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "indexes_equal",
|
|
child: TraceBool {
|
|
location: TraceScalarId(25),
|
|
name: "indexes_equal",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "empty",
|
|
child: TraceBool {
|
|
location: TraceScalarId(26),
|
|
name: "empty",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "full",
|
|
child: TraceBool {
|
|
location: TraceScalarId(27),
|
|
name: "full",
|
|
flow: Duplex,
|
|
},
|
|
ty: Bool,
|
|
},
|
|
TraceWire {
|
|
name: "unwrap_or_else_out",
|
|
child: TraceUInt {
|
|
location: TraceScalarId(28),
|
|
name: "unwrap_or_else_out",
|
|
ty: UInt<8>,
|
|
flow: Duplex,
|
|
},
|
|
ty: UInt<8>,
|
|
},
|
|
TraceWire {
|
|
name: "count_lower",
|
|
child: TraceUInt {
|
|
location: TraceScalarId(29),
|
|
name: "count_lower",
|
|
ty: UInt<1>,
|
|
flow: Duplex,
|
|
},
|
|
ty: UInt<1>,
|
|
},
|
|
],
|
|
},
|
|
traces: [
|
|
SimTrace {
|
|
id: TraceScalarId(0),
|
|
kind: BigClock {
|
|
index: StatePartIndex<BigSlots>(0),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(1),
|
|
kind: BigSyncReset {
|
|
index: StatePartIndex<BigSlots>(1),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(2),
|
|
kind: EnumDiscriminant {
|
|
index: StatePartIndex<SmallSlots>(0),
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(3),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(5),
|
|
ty: UInt<8>,
|
|
},
|
|
state: 0x23,
|
|
last_state: 0x23,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(4),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(3),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(5),
|
|
kind: EnumDiscriminant {
|
|
index: StatePartIndex<SmallSlots>(1),
|
|
ty: Enum {
|
|
HdlNone,
|
|
HdlSome(UInt<8>),
|
|
},
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(6),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(9),
|
|
ty: UInt<8>,
|
|
},
|
|
state: 0x23,
|
|
last_state: 0x23,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(7),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(7),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(8),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(10),
|
|
ty: UInt<2>,
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(9),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(11),
|
|
ty: UInt<1>,
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(10),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(12),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(11),
|
|
kind: BigClock {
|
|
index: StatePartIndex<BigSlots>(13),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(12),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(14),
|
|
ty: UInt<8>,
|
|
},
|
|
state: 0x23,
|
|
last_state: 0x23,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(13),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(15),
|
|
ty: UInt<1>,
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(14),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(16),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(15),
|
|
kind: BigClock {
|
|
index: StatePartIndex<BigSlots>(17),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(16),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(18),
|
|
ty: UInt<8>,
|
|
},
|
|
state: 0x23,
|
|
last_state: 0x23,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(17),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(19),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(18),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(22),
|
|
ty: UInt<1>,
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(19),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(25),
|
|
ty: UInt<1>,
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(20),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(27),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(21),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(30),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(22),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(31),
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(23),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(32),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(24),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(33),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(25),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(34),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(26),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(36),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(27),
|
|
kind: BigBool {
|
|
index: StatePartIndex<BigSlots>(39),
|
|
},
|
|
state: 0x0,
|
|
last_state: 0x0,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(28),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(42),
|
|
ty: UInt<8>,
|
|
},
|
|
state: 0x23,
|
|
last_state: 0x23,
|
|
},
|
|
SimTrace {
|
|
id: TraceScalarId(29),
|
|
kind: BigUInt {
|
|
index: StatePartIndex<BigSlots>(68),
|
|
ty: UInt<1>,
|
|
},
|
|
state: 0x1,
|
|
last_state: 0x1,
|
|
},
|
|
],
|
|
trace_memories: {
|
|
StatePartIndex<Memories>(0): TraceMem {
|
|
id: TraceMemoryId(0),
|
|
name: "mem",
|
|
stride: 8,
|
|
element_type: TraceUInt {
|
|
location: TraceMemoryLocation {
|
|
id: TraceMemoryId(0),
|
|
depth: 2,
|
|
stride: 8,
|
|
start: 0,
|
|
len: 8,
|
|
},
|
|
name: "mem",
|
|
ty: UInt<8>,
|
|
flow: Duplex,
|
|
},
|
|
ports: [
|
|
TraceMemPort {
|
|
name: "r0",
|
|
bundle: TraceBundle {
|
|
name: "r0",
|
|
fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(9),
|
|
name: "addr",
|
|
ty: UInt<1>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(10),
|
|
name: "en",
|
|
flow: Sink,
|
|
},
|
|
TraceClock {
|
|
location: TraceScalarId(11),
|
|
name: "clk",
|
|
flow: Sink,
|
|
},
|
|
TraceUInt {
|
|
location: TraceScalarId(12),
|
|
name: "data",
|
|
ty: UInt<8>,
|
|
flow: Source,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
#[hdl(flip)] /* offset = 3 */
|
|
data: UInt<8>,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
#[hdl(flip)] /* offset = 3 */
|
|
data: UInt<8>,
|
|
},
|
|
},
|
|
TraceMemPort {
|
|
name: "w1",
|
|
bundle: TraceBundle {
|
|
name: "w1",
|
|
fields: [
|
|
TraceUInt {
|
|
location: TraceScalarId(13),
|
|
name: "addr",
|
|
ty: UInt<1>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(14),
|
|
name: "en",
|
|
flow: Sink,
|
|
},
|
|
TraceClock {
|
|
location: TraceScalarId(15),
|
|
name: "clk",
|
|
flow: Sink,
|
|
},
|
|
TraceUInt {
|
|
location: TraceScalarId(16),
|
|
name: "data",
|
|
ty: UInt<8>,
|
|
flow: Sink,
|
|
},
|
|
TraceBool {
|
|
location: TraceScalarId(17),
|
|
name: "mask",
|
|
flow: Sink,
|
|
},
|
|
],
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
/* offset = 3 */
|
|
data: UInt<8>,
|
|
/* offset = 11 */
|
|
mask: Bool,
|
|
},
|
|
flow: Sink,
|
|
},
|
|
ty: Bundle {
|
|
/* offset = 0 */
|
|
addr: UInt<1>,
|
|
/* offset = 1 */
|
|
en: Bool,
|
|
/* offset = 2 */
|
|
clk: Clock,
|
|
/* offset = 3 */
|
|
data: UInt<8>,
|
|
/* offset = 11 */
|
|
mask: Bool,
|
|
},
|
|
},
|
|
],
|
|
array_type: Array<UInt<8>, 2>,
|
|
},
|
|
},
|
|
trace_writers: [
|
|
Running(
|
|
VcdWriter {
|
|
finished_init: true,
|
|
timescale: 1 ps,
|
|
..
|
|
},
|
|
),
|
|
],
|
|
clocks_triggered: [
|
|
StatePartIndex<SmallSlots>(3),
|
|
StatePartIndex<SmallSlots>(8),
|
|
StatePartIndex<SmallSlots>(15),
|
|
],
|
|
event_queue: EventQueue(EventQueueData {
|
|
instant: 100 μs,
|
|
events: {},
|
|
}),
|
|
waiting_sensitivity_sets_by_address: {},
|
|
waiting_sensitivity_sets_by_compiled_value: {},
|
|
..
|
|
} |