forked from libre-chip/fayalite
34 lines
543 B
Text
34 lines
543 B
Text
$timescale 1 ps $end
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$scope module mod1 $end
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$scope struct o $end
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$var wire 4 avK(^ i $end
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$var wire 2 Q2~aG o $end
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$var wire 2 DXK'| i2 $end
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$var wire 4 cPuix o2 $end
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$upscope $end
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$scope module child $end
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$var wire 4 ($5K7 i $end
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$var wire 2 %6Wv" o $end
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$var wire 2 +|-AU i2 $end
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$var wire 4 Hw?%j o2 $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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$dumpvars
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b11 avK(^
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b11 Q2~aG
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b10 DXK'|
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b1110 cPuix
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b11 ($5K7
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b11 %6Wv"
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b10 +|-AU
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b1110 Hw?%j
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$end
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#1000000
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b1010 avK(^
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b10 Q2~aG
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b1111 cPuix
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b1010 ($5K7
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b10 %6Wv"
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b1111 Hw?%j
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#2000000
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