forked from libre-chip/fayalite
194 lines
1.3 KiB
Plaintext
194 lines
1.3 KiB
Plaintext
$timescale 1 ps $end
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$scope module shift_register $end
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$scope struct cd $end
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$var wire 1 ! clk $end
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$var wire 1 " rst $end
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$upscope $end
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$var wire 1 # d $end
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$var wire 1 $ q $end
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$var reg 1 % reg0 $end
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$var reg 1 & reg1 $end
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$var reg 1 ' reg2 $end
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$var reg 1 ( reg3 $end
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$upscope $end
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$enddefinitions $end
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$dumpvars
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0!
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1"
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0#
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0$
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0%
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0&
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0'
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0(
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$end
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#1000000
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1!
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#1100000
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0"
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#2000000
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0!
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#3000000
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1!
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#4000000
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1#
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1%
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#66000000
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