Simulation { state: State { insns: Insns { state_layout: StateLayout { ty: TypeLayout { small_slots: StatePartLayout { len: 18, debug_data: [ SlotDebugData { name: "", ty: Enum { HdlNone, HdlSome, }, }, SlotDebugData { name: "", ty: Enum { HdlNone, HdlSome, }, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, ], .. }, big_slots: StatePartLayout { len: 70, debug_data: [ SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.rst", ty: SyncReset, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum { HdlNone, HdlSome(UInt<8>), }, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool, }, SlotDebugData { name: "", ty: UInt<9>, }, SlotDebugData { name: "", ty: UInt<8>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum { HdlNone, HdlSome(UInt<8>), }, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.ready", ty: Bool, }, SlotDebugData { name: "", ty: UInt<9>, }, SlotDebugData { name: "", ty: UInt<8>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<3>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.addr", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.en", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.clk", ty: Clock, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.addr", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.en", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.clk", ty: Clock, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.data", ty: UInt<8>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.mask", ty: Bool, }, SlotDebugData { name: "", ty: UInt<8>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<2>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::empty", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::full", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8>, }, SlotDebugData { name: "", ty: UInt<8>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: ".0", ty: UInt<1>, }, SlotDebugData { name: ".1", ty: UInt<8>, }, SlotDebugData { name: "", ty: UInt<1>, }, SlotDebugData { name: "", ty: UInt<9>, }, SlotDebugData { name: "", ty: UInt<9>, }, SlotDebugData { name: "", ty: UInt<9>, }, SlotDebugData { name: "", ty: Enum { HdlNone, HdlSome(UInt<8>), }, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: UInt<64>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: UInt<0>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<3>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: Bool, }, SlotDebugData { name: "", ty: UInt<3>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<64>, }, SlotDebugData { name: "", ty: UInt<3>, }, SlotDebugData { name: "", ty: UInt<3>, }, SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count_lower", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<3>, }, SlotDebugData { name: "", ty: UInt<2>, }, SlotDebugData { name: "", ty: UInt<3>, }, ], .. }, sim_only_slots: StatePartLayout { len: 0, debug_data: [], layout_data: [], .. }, }, memories: StatePartLayout { len: 1, debug_data: [ (), ], layout_data: [ MemoryData { array_type: Array, 4>, data: [ // len = 0x4 [0x0]: 0x00, [0x1]: 0x00, [0x2]: 0x00, [0x3]: 0x00, ], }, ], .. }, }, insns: [ // at: ready_valid.rs:64:1 0: SubU { dest: StatePartIndex(67), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, lhs: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, rhs: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, dest_width: 3, }, 1: CastToUInt { dest: StatePartIndex(68), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(67), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, dest_width: 2, }, // at: ready_valid.rs:178:13 2: Copy { dest: StatePartIndex(66), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count_lower", ty: UInt<2> }, src: StatePartIndex(68), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:64:1 3: CastToUInt { dest: StatePartIndex(69), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, src: StatePartIndex(66), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count_lower", ty: UInt<2> }, dest_width: 3, }, 4: Const { dest: StatePartIndex(63), // (0x4) SlotDebugData { name: "", ty: UInt<64> }, value: 0x4, }, 5: CastToUInt { dest: StatePartIndex(64), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, src: StatePartIndex(63), // (0x4) SlotDebugData { name: "", ty: UInt<64> }, dest_width: 3, }, 6: Const { dest: StatePartIndex(56), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, value: 0x0, }, 7: CastToUInt { dest: StatePartIndex(57), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(56), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, dest_width: 2, }, 8: CastToUInt { dest: StatePartIndex(65), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, src: StatePartIndex(56), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, dest_width: 3, }, 9: Const { dest: StatePartIndex(54), // (0x3) SlotDebugData { name: "", ty: UInt<64> }, value: 0x3, }, 10: CmpEq { dest: StatePartIndex(55), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, rhs: StatePartIndex(54), // (0x3) SlotDebugData { name: "", ty: UInt<64> }, }, 11: CmpEq { dest: StatePartIndex(60), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, rhs: StatePartIndex(54), // (0x3) SlotDebugData { name: "", ty: UInt<64> }, }, 12: Const { dest: StatePartIndex(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, value: 0x1, }, 13: Add { dest: StatePartIndex(58), // (0x2) SlotDebugData { name: "", ty: UInt<3> }, lhs: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, rhs: StatePartIndex(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, 14: CastToUInt { dest: StatePartIndex(59), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(58), // (0x2) SlotDebugData { name: "", ty: UInt<3> }, dest_width: 2, }, 15: Add { dest: StatePartIndex(61), // (0x2) SlotDebugData { name: "", ty: UInt<3> }, lhs: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, rhs: StatePartIndex(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, 16: CastToUInt { dest: StatePartIndex(62), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(61), // (0x2) SlotDebugData { name: "", ty: UInt<3> }, dest_width: 2, }, 17: Const { dest: StatePartIndex(43), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, value: 0x0, }, // at: ready_valid.rs:118:30 18: Copy { dest: StatePartIndex(42), // (0x2c) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> }, src: StatePartIndex(43), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, }, // at: ready_valid.rs:117:5 19: Copy { dest: StatePartIndex(17), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.clk", ty: Clock }, src: StatePartIndex(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock }, }, // at: ready_valid.rs:115:5 20: Copy { dest: StatePartIndex(15), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.addr", ty: UInt<2> }, src: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, }, // at: ready_valid.rs:114:5 21: Copy { dest: StatePartIndex(13), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.clk", ty: Clock }, src: StatePartIndex(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock }, }, // at: ready_valid.rs:64:1 22: Const { dest: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, value: 0x1, }, // at: ready_valid.rs:113:5 23: Copy { dest: StatePartIndex(12), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.en", ty: Bool }, src: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:119:5 24: Copy { dest: StatePartIndex(19), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.mask", ty: Bool }, src: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:112:5 25: Copy { dest: StatePartIndex(11), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.addr", ty: UInt<2> }, src: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, }, // at: ready_valid.rs:64:1 26: NotU { dest: StatePartIndex(37), // (0x0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, width: 1, }, 27: CmpEq { dest: StatePartIndex(35), // (0x1) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, rhs: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, }, // at: ready_valid.rs:104:5 28: Copy { dest: StatePartIndex(34), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool }, src: StatePartIndex(35), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:64:1 29: And { dest: StatePartIndex(38), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(34), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool }, rhs: StatePartIndex(37), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:107:5 30: Copy { dest: StatePartIndex(36), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::empty", ty: Bool }, src: StatePartIndex(38), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:64:1 31: NotU { dest: StatePartIndex(45), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(36), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::empty", ty: Bool }, width: 1, }, 32: And { dest: StatePartIndex(40), // (0x1) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(34), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool }, rhs: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, }, // at: ready_valid.rs:110:5 33: Copy { dest: StatePartIndex(39), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::full", ty: Bool }, src: StatePartIndex(40), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:64:1 34: NotU { dest: StatePartIndex(44), // (0x0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(39), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::full", ty: Bool }, width: 1, }, // at: ready_valid.rs:121:5 35: Copy { dest: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool }, src: StatePartIndex(44), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:124:9 36: BranchIfZero { target: 38, value: StatePartIndex(7), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.ready", ty: Bool }, }, // at: ready_valid.rs:125:13 37: Copy { dest: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool }, src: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:166:5 38: BranchIfZero { target: 43, value: StatePartIndex(34), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool }, }, // at: ready_valid.rs:168:9 39: BranchIfZero { target: 41, value: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, }, // at: ready_valid.rs:169:13 40: Copy { dest: StatePartIndex(10), // (0x4) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<3> }, src: StatePartIndex(64), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, }, // at: ready_valid.rs:168:9 41: BranchIfNonZero { target: 43, value: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, }, // at: ready_valid.rs:171:13 42: Copy { dest: StatePartIndex(10), // (0x4) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<3> }, src: StatePartIndex(65), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, }, // at: ready_valid.rs:166:5 43: BranchIfNonZero { target: 45, value: StatePartIndex(34), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::indexes_equal", ty: Bool }, }, // at: ready_valid.rs:182:13 44: Copy { dest: StatePartIndex(10), // (0x4) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::count", ty: UInt<3> }, src: StatePartIndex(69), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, }, // at: ready_valid.rs:88:26 45: Copy { dest: StatePartIndex(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool }, src: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, }, // at: ready_valid.rs:64:1 46: Const { dest: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: Bool }, value: 0x0, }, // at: ready_valid.rs:86:25 47: Copy { dest: StatePartIndex(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<2> }, src: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, }, // at: ready_valid.rs:84:31 48: IsNonZeroDestIsSmall { dest: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(1), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.rst", ty: SyncReset }, }, 49: IsNonZeroDestIsSmall { dest: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(0), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::cd.clk", ty: Clock }, }, 50: AndSmall { dest: StatePartIndex(15), // (0x0 0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(14), // (0x1 1) SlotDebugData { name: "", ty: Bool }, }, 51: Copy { dest: StatePartIndex(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<2> }, src: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, }, // at: ready_valid.rs:64:1 52: Const { dest: StatePartIndex(24), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, value: 0x0, }, // at: ready_valid.rs:91:19 53: CastBigToArrayIndex { dest: StatePartIndex(11), // (0x1 1) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(15), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.addr", ty: UInt<2> }, }, 54: IsNonZeroDestIsSmall { dest: StatePartIndex(9), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(17), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.clk", ty: Clock }, }, 55: AndSmall { dest: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(9), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(7), // (0x1 1) SlotDebugData { name: "", ty: Bool }, }, 56: CastBigToArrayIndex { dest: StatePartIndex(6), // (0x1 1) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(11), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.addr", ty: UInt<2> }, }, 57: IsNonZeroDestIsSmall { dest: StatePartIndex(5), // (0x1 1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(12), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.en", ty: Bool }, }, 58: BranchIfSmallZero { target: 61, value: StatePartIndex(5), // (0x1 1) SlotDebugData { name: "", ty: Bool }, }, 59: MemoryReadUInt { dest: StatePartIndex(14), // (0x29) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> }, memory: StatePartIndex(0), // (MemoryData { // array_type: Array, 4>, // data: [ // // len = 0x4 // [0x0]: 0x2c, // [0x1]: 0x29, // [0x2]: 0x2a, // [0x3]: 0x2b, // ], // }) (), addr: StatePartIndex(6), // (0x1 1) SlotDebugData { name: "", ty: UInt<2> }, stride: 8, start: 0, width: 8, }, 60: Branch { target: 62, }, 61: Const { dest: StatePartIndex(14), // (0x29) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> }, value: 0x0, }, // at: ready_valid.rs:64:1 62: Copy { dest: StatePartIndex(46), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, src: StatePartIndex(48), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, 63: Copy { dest: StatePartIndex(47), // (0x29) SlotDebugData { name: ".1", ty: UInt<8> }, src: StatePartIndex(14), // (0x29) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.data", ty: UInt<8> }, }, 64: Shl { dest: StatePartIndex(49), // (0x52) SlotDebugData { name: "", ty: UInt<9> }, lhs: StatePartIndex(47), // (0x29) SlotDebugData { name: ".1", ty: UInt<8> }, rhs: 1, }, 65: Or { dest: StatePartIndex(50), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, lhs: StatePartIndex(46), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, rhs: StatePartIndex(49), // (0x52) SlotDebugData { name: "", ty: UInt<9> }, }, 66: CastToUInt { dest: StatePartIndex(51), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, src: StatePartIndex(50), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, dest_width: 9, }, 67: Copy { dest: StatePartIndex(52), // (0x53) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, src: StatePartIndex(51), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, }, // at: ready_valid.rs:130:5 68: BranchIfZero { target: 70, value: StatePartIndex(45), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:131:9 69: Copy { dest: StatePartIndex(6), // (0x53) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, src: StatePartIndex(52), // (0x53) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, }, // at: ready_valid.rs:130:5 70: BranchIfNonZero { target: 72, value: StatePartIndex(45), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:134:13 71: Copy { dest: StatePartIndex(6), // (0x53) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, src: StatePartIndex(2), // (0x59) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, }, // at: ready_valid.rs:91:19 72: IsNonZeroDestIsSmall { dest: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(13), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::r0.clk", ty: Clock }, }, 73: AndSmall { dest: StatePartIndex(3), // (0x0 0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(2), // (0x1 1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:64:1 74: Copy { dest: StatePartIndex(8), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, src: StatePartIndex(6), // (0x53) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, }, 75: SliceInt { dest: StatePartIndex(9), // (0x29) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(8), // (0x53) SlotDebugData { name: "", ty: UInt<9> }, start: 1, len: 8, }, // at: ready_valid.rs:79:32 76: AndBigWithSmallImmediate { dest: StatePartIndex(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(6), // (0x53) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, rhs: 0x1, }, // at: ready_valid.rs:19:9 77: BranchIfSmallNeImmediate { target: 79, lhs: StatePartIndex(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x0, }, // at: ready_valid.rs:20:24 78: Copy { dest: StatePartIndex(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:19:9 79: BranchIfSmallNeImmediate { target: 81, lhs: StatePartIndex(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: ready_valid.rs:21:27 80: Copy { dest: StatePartIndex(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, src: StatePartIndex(7), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out.ready", ty: Bool }, }, // at: ready_valid.rs:101:5 81: Copy { dest: StatePartIndex(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool }, src: StatePartIndex(33), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, }, // at: ready_valid.rs:156:5 82: BranchIfZero { target: 87, value: StatePartIndex(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool }, }, // at: ready_valid.rs:158:9 83: BranchIfZero { target: 85, value: StatePartIndex(60), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:159:13 84: Copy { dest: StatePartIndex(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<2> }, src: StatePartIndex(57), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:158:9 85: BranchIfNonZero { target: 87, value: StatePartIndex(60), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:161:13 86: Copy { dest: StatePartIndex(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<2> }, src: StatePartIndex(62), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:64:1 87: Copy { dest: StatePartIndex(4), // (0x59) SlotDebugData { name: "", ty: UInt<9> }, src: StatePartIndex(2), // (0x59) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, }, 88: SliceInt { dest: StatePartIndex(5), // (0x2c) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(4), // (0x59) SlotDebugData { name: "", ty: UInt<9> }, start: 1, len: 8, }, // at: ready_valid.rs:77:32 89: AndBigWithSmallImmediate { dest: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(2), // (0x59) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.data", ty: Enum {HdlNone, HdlSome(UInt<8>)} }, rhs: 0x1, }, // at: ready_valid.rs:19:9 90: BranchIfSmallNeImmediate { target: 92, lhs: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x0, }, // at: ready_valid.rs:20:24 91: Copy { dest: StatePartIndex(31), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:19:9 92: BranchIfSmallNeImmediate { target: 94, lhs: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: ready_valid.rs:21:27 93: Copy { dest: StatePartIndex(31), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, src: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp.ready", ty: Bool }, }, // at: ready_valid.rs:98:5 94: Copy { dest: StatePartIndex(30), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool }, src: StatePartIndex(31), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::firing", ty: Bool }, }, // at: ready_valid.rs:116:5 95: Copy { dest: StatePartIndex(16), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.en", ty: Bool }, src: StatePartIndex(30), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool }, }, // at: ready_valid.rs:91:19 96: IsNonZeroDestIsSmall { dest: StatePartIndex(10), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(16), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.en", ty: Bool }, }, // at: ready_valid.rs:64:1 97: CmpNe { dest: StatePartIndex(53), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(30), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool }, rhs: StatePartIndex(32), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_firing", ty: Bool }, }, // at: ready_valid.rs:141:5 98: BranchIfZero { target: 100, value: StatePartIndex(53), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:142:9 99: Copy { dest: StatePartIndex(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool }, src: StatePartIndex(30), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool }, }, // at: ready_valid.rs:146:5 100: BranchIfZero { target: 105, value: StatePartIndex(30), // (0x0) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_firing", ty: Bool }, }, // at: ready_valid.rs:148:9 101: BranchIfZero { target: 103, value: StatePartIndex(55), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:149:13 102: Copy { dest: StatePartIndex(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<2> }, src: StatePartIndex(57), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:148:9 103: BranchIfNonZero { target: 105, value: StatePartIndex(55), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:151:13 104: Copy { dest: StatePartIndex(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<2> }, src: StatePartIndex(59), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:118:30 105: BranchIfSmallNeImmediate { target: 107, lhs: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, 106: Copy { dest: StatePartIndex(42), // (0x2c) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> }, src: StatePartIndex(5), // (0x2c) SlotDebugData { name: "", ty: UInt<8> }, }, // at: ready_valid.rs:118:5 107: Copy { dest: StatePartIndex(18), // (0x2c) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.data", ty: UInt<8> }, src: StatePartIndex(42), // (0x2c) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::unwrap_or_else_out", ty: UInt<8> }, }, // at: ready_valid.rs:84:31 108: BranchIfSmallZero { target: 113, value: StatePartIndex(15), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 109: BranchIfSmallNonZero { target: 112, value: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 110: Copy { dest: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, src: StatePartIndex(23), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg$next", ty: UInt<2> }, }, 111: Branch { target: 113, }, 112: Copy { dest: StatePartIndex(22), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::inp_index_reg", ty: UInt<2> }, src: StatePartIndex(24), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:86:25 113: BranchIfSmallZero { target: 118, value: StatePartIndex(15), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 114: BranchIfSmallNonZero { target: 117, value: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 115: Copy { dest: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, src: StatePartIndex(26), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg$next", ty: UInt<2> }, }, 116: Branch { target: 118, }, 117: Copy { dest: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::out_index_reg", ty: UInt<2> }, src: StatePartIndex(24), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: ready_valid.rs:88:26 118: BranchIfSmallZero { target: 123, value: StatePartIndex(15), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 119: BranchIfSmallNonZero { target: 122, value: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 120: Copy { dest: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, src: StatePartIndex(28), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg$next", ty: Bool }, }, 121: Branch { target: 123, }, 122: Copy { dest: StatePartIndex(27), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::maybe_full_reg", ty: Bool }, src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:91:19 123: BranchIfSmallZero { target: 124, value: StatePartIndex(3), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 124: BranchIfSmallZero { target: 132, value: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 125: CopySmall { dest: StatePartIndex(12), // (0x0 0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(11), // (0x1 1) SlotDebugData { name: "", ty: UInt<2> }, }, 126: CopySmall { dest: StatePartIndex(13), // (0x1 1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(10), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, 127: Copy { dest: StatePartIndex(20), // (0x2c) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(18), // (0x2c) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.data", ty: UInt<8> }, }, 128: Copy { dest: StatePartIndex(21), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(19), // (0x1) SlotDebugData { name: "InstantiatedModule(queue: queue).queue::mem::w1.mask", ty: Bool }, }, 129: BranchIfSmallZero { target: 132, value: StatePartIndex(13), // (0x1 1) SlotDebugData { name: "", ty: Bool }, }, 130: BranchIfZero { target: 132, value: StatePartIndex(21), // (0x1) SlotDebugData { name: "", ty: Bool }, }, 131: MemoryWriteUInt { value: StatePartIndex(20), // (0x2c) SlotDebugData { name: "", ty: UInt<8> }, memory: StatePartIndex(0), // (MemoryData { // array_type: Array, 4>, // data: [ // // len = 0x4 // [0x0]: 0x2c, // [0x1]: 0x29, // [0x2]: 0x2a, // [0x3]: 0x2b, // ], // }) (), addr: StatePartIndex(12), // (0x0 0) SlotDebugData { name: "", ty: UInt<2> }, stride: 8, start: 0, width: 8, }, 132: XorSmallImmediate { dest: StatePartIndex(2), // (0x1 1) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: 0x1, }, 133: XorSmallImmediate { dest: StatePartIndex(7), // (0x1 1) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(9), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: 0x1, }, // at: ready_valid.rs:84:31 134: XorSmallImmediate { dest: StatePartIndex(14), // (0x1 1) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Bool }, rhs: 0x1, }, // at: ready_valid.rs:64:1 135: Return, ], .. }, pc: 135, memory_write_log: [], assert_failed_log: [], memories: StatePart { value: [ MemoryData { array_type: Array, 4>, data: [ // len = 0x4 [0x0]: 0x2c, [0x1]: 0x29, [0x2]: 0x2a, [0x3]: 0x2b, ], }, ], }, small_slots: StatePart { value: [ 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, ], }, big_slots: StatePart { value: [ 0, 0, 89, 0, 89, 44, 83, 0, 83, 41, 4, 1, 1, 0, 41, 1, 0, 0, 44, 1, 44, 1, 1, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 1, 1, 44, 0, 0, 1, 1, 41, 1, 82, 83, 83, 83, 0, 3, 0, 0, 0, 2, 2, 0, 2, 2, 4, 4, 0, 0, 0, 0, 0, ], }, sim_only_slots: StatePart { value: [], }, }, io: Instance { name: ::queue, instantiated: Module { name: queue, .. }, }, global_io: {}, main_module: SimulationModuleState { base_targets: [ Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.cd, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.inp, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.out, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.count, ], uninitialized_ios: {}, io_targets: { Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.cd, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.cd.clk, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.cd.rst, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.count, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.inp, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.inp.data, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.inp.ready, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.out, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.out.data, Instance { name: ::queue, instantiated: Module { name: queue, .. }, }.out.ready, }, did_initial_settle: true, clocks_for_past: {}, }, extern_modules: [], trace_decls: TraceModule { name: "queue", children: [ TraceModuleIO { name: "cd", child: TraceBundle { name: "cd", fields: [ TraceClock { location: TraceScalarId(0), name: "clk", flow: Source, }, TraceSyncReset { location: TraceScalarId(1), name: "rst", flow: Source, }, ], ty: Bundle { /* offset = 0 */ clk: Clock, /* offset = 1 */ rst: SyncReset, }, flow: Source, }, ty: Bundle { /* offset = 0 */ clk: Clock, /* offset = 1 */ rst: SyncReset, }, flow: Source, }, TraceModuleIO { name: "inp", child: TraceBundle { name: "inp", fields: [ TraceEnumWithFields { name: "data", discriminant: TraceEnumDiscriminant { location: TraceScalarId(2), name: "$tag", ty: Enum { HdlNone, HdlSome(UInt<8>), }, flow: Source, }, non_empty_fields: [ TraceUInt { location: TraceScalarId(3), name: "HdlSome", ty: UInt<8>, flow: Source, }, ], ty: Enum { HdlNone, HdlSome(UInt<8>), }, flow: Source, }, TraceBool { location: TraceScalarId(4), name: "ready", flow: Sink, }, ], ty: Bundle { /* offset = 0 */ data: Enum { HdlNone, HdlSome(UInt<8>), }, #[hdl(flip)] /* offset = 9 */ ready: Bool, }, flow: Source, }, ty: Bundle { /* offset = 0 */ data: Enum { HdlNone, HdlSome(UInt<8>), }, #[hdl(flip)] /* offset = 9 */ ready: Bool, }, flow: Source, }, TraceModuleIO { name: "out", child: TraceBundle { name: "out", fields: [ TraceEnumWithFields { name: "data", discriminant: TraceEnumDiscriminant { location: TraceScalarId(5), name: "$tag", ty: Enum { HdlNone, HdlSome(UInt<8>), }, flow: Sink, }, non_empty_fields: [ TraceUInt { location: TraceScalarId(6), name: "HdlSome", ty: UInt<8>, flow: Source, }, ], ty: Enum { HdlNone, HdlSome(UInt<8>), }, flow: Sink, }, TraceBool { location: TraceScalarId(7), name: "ready", flow: Source, }, ], ty: Bundle { /* offset = 0 */ data: Enum { HdlNone, HdlSome(UInt<8>), }, #[hdl(flip)] /* offset = 9 */ ready: Bool, }, flow: Sink, }, ty: Bundle { /* offset = 0 */ data: Enum { HdlNone, HdlSome(UInt<8>), }, #[hdl(flip)] /* offset = 9 */ ready: Bool, }, flow: Sink, }, TraceModuleIO { name: "count", child: TraceUInt { location: TraceScalarId(8), name: "count", ty: UInt<3>, flow: Sink, }, ty: UInt<3>, flow: Sink, }, TraceMem { id: TraceMemoryId(0), name: "mem", stride: 8, element_type: TraceUInt { location: TraceMemoryLocation { id: TraceMemoryId(0), depth: 4, stride: 8, start: 0, len: 8, }, name: "mem", ty: UInt<8>, flow: Duplex, }, ports: [ TraceMemPort { name: "r0", bundle: TraceBundle { name: "r0", fields: [ TraceUInt { location: TraceScalarId(9), name: "addr", ty: UInt<2>, flow: Sink, }, TraceBool { location: TraceScalarId(10), name: "en", flow: Sink, }, TraceClock { location: TraceScalarId(11), name: "clk", flow: Sink, }, TraceUInt { location: TraceScalarId(12), name: "data", ty: UInt<8>, flow: Source, }, ], ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, #[hdl(flip)] /* offset = 4 */ data: UInt<8>, }, flow: Sink, }, ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, #[hdl(flip)] /* offset = 4 */ data: UInt<8>, }, }, TraceMemPort { name: "w1", bundle: TraceBundle { name: "w1", fields: [ TraceUInt { location: TraceScalarId(13), name: "addr", ty: UInt<2>, flow: Sink, }, TraceBool { location: TraceScalarId(14), name: "en", flow: Sink, }, TraceClock { location: TraceScalarId(15), name: "clk", flow: Sink, }, TraceUInt { location: TraceScalarId(16), name: "data", ty: UInt<8>, flow: Sink, }, TraceBool { location: TraceScalarId(17), name: "mask", flow: Sink, }, ], ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, /* offset = 4 */ data: UInt<8>, /* offset = 12 */ mask: Bool, }, flow: Sink, }, ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, /* offset = 4 */ data: UInt<8>, /* offset = 12 */ mask: Bool, }, }, ], array_type: Array, 4>, }, TraceReg { name: "inp_index_reg", child: TraceUInt { location: TraceScalarId(18), name: "inp_index_reg", ty: UInt<2>, flow: Duplex, }, ty: UInt<2>, }, TraceReg { name: "out_index_reg", child: TraceUInt { location: TraceScalarId(19), name: "out_index_reg", ty: UInt<2>, flow: Duplex, }, ty: UInt<2>, }, TraceReg { name: "maybe_full_reg", child: TraceBool { location: TraceScalarId(20), name: "maybe_full_reg", flow: Duplex, }, ty: Bool, }, TraceWire { name: "inp_firing", child: TraceBool { location: TraceScalarId(21), name: "inp_firing", flow: Duplex, }, ty: Bool, }, TraceWire { name: "firing", child: TraceBool { location: TraceScalarId(22), name: "firing", flow: Duplex, }, ty: Bool, }, TraceWire { name: "out_firing", child: TraceBool { location: TraceScalarId(23), name: "out_firing", flow: Duplex, }, ty: Bool, }, TraceWire { name: "firing", child: TraceBool { location: TraceScalarId(24), name: "firing", flow: Duplex, }, ty: Bool, }, TraceWire { name: "indexes_equal", child: TraceBool { location: TraceScalarId(25), name: "indexes_equal", flow: Duplex, }, ty: Bool, }, TraceWire { name: "empty", child: TraceBool { location: TraceScalarId(26), name: "empty", flow: Duplex, }, ty: Bool, }, TraceWire { name: "full", child: TraceBool { location: TraceScalarId(27), name: "full", flow: Duplex, }, ty: Bool, }, TraceWire { name: "unwrap_or_else_out", child: TraceUInt { location: TraceScalarId(28), name: "unwrap_or_else_out", ty: UInt<8>, flow: Duplex, }, ty: UInt<8>, }, TraceWire { name: "count_lower", child: TraceUInt { location: TraceScalarId(29), name: "count_lower", ty: UInt<2>, flow: Duplex, }, ty: UInt<2>, }, ], }, traces: [ SimTrace { id: TraceScalarId(0), kind: BigClock { index: StatePartIndex(0), }, maybe_changed: true, state: 0x0, last_state: 0x1, }, SimTrace { id: TraceScalarId(1), kind: BigSyncReset { index: StatePartIndex(1), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(2), kind: EnumDiscriminant { index: StatePartIndex(0), ty: Enum { HdlNone, HdlSome(UInt<8>), }, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(3), kind: BigUInt { index: StatePartIndex(5), ty: UInt<8>, }, maybe_changed: true, state: 0x2c, last_state: 0x2c, }, SimTrace { id: TraceScalarId(4), kind: BigBool { index: StatePartIndex(3), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(5), kind: EnumDiscriminant { index: StatePartIndex(1), ty: Enum { HdlNone, HdlSome(UInt<8>), }, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(6), kind: BigUInt { index: StatePartIndex(9), ty: UInt<8>, }, maybe_changed: true, state: 0x29, last_state: 0x29, }, SimTrace { id: TraceScalarId(7), kind: BigBool { index: StatePartIndex(7), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(8), kind: BigUInt { index: StatePartIndex(10), ty: UInt<3>, }, maybe_changed: true, state: 0x4, last_state: 0x4, }, SimTrace { id: TraceScalarId(9), kind: BigUInt { index: StatePartIndex(11), ty: UInt<2>, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(10), kind: BigBool { index: StatePartIndex(12), }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(11), kind: BigClock { index: StatePartIndex(13), }, maybe_changed: true, state: 0x0, last_state: 0x1, }, SimTrace { id: TraceScalarId(12), kind: BigUInt { index: StatePartIndex(14), ty: UInt<8>, }, maybe_changed: true, state: 0x29, last_state: 0x29, }, SimTrace { id: TraceScalarId(13), kind: BigUInt { index: StatePartIndex(15), ty: UInt<2>, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(14), kind: BigBool { index: StatePartIndex(16), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(15), kind: BigClock { index: StatePartIndex(17), }, maybe_changed: true, state: 0x0, last_state: 0x1, }, SimTrace { id: TraceScalarId(16), kind: BigUInt { index: StatePartIndex(18), ty: UInt<8>, }, maybe_changed: true, state: 0x2c, last_state: 0x2c, }, SimTrace { id: TraceScalarId(17), kind: BigBool { index: StatePartIndex(19), }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(18), kind: BigUInt { index: StatePartIndex(22), ty: UInt<2>, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(19), kind: BigUInt { index: StatePartIndex(25), ty: UInt<2>, }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(20), kind: BigBool { index: StatePartIndex(27), }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(21), kind: BigBool { index: StatePartIndex(30), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(22), kind: BigBool { index: StatePartIndex(31), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(23), kind: BigBool { index: StatePartIndex(32), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(24), kind: BigBool { index: StatePartIndex(33), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(25), kind: BigBool { index: StatePartIndex(34), }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(26), kind: BigBool { index: StatePartIndex(36), }, maybe_changed: true, state: 0x0, last_state: 0x0, }, SimTrace { id: TraceScalarId(27), kind: BigBool { index: StatePartIndex(39), }, maybe_changed: true, state: 0x1, last_state: 0x1, }, SimTrace { id: TraceScalarId(28), kind: BigUInt { index: StatePartIndex(42), ty: UInt<8>, }, maybe_changed: true, state: 0x2c, last_state: 0x2c, }, SimTrace { id: TraceScalarId(29), kind: BigUInt { index: StatePartIndex(66), ty: UInt<2>, }, maybe_changed: true, state: 0x0, last_state: 0x0, }, ], trace_memories: { StatePartIndex(0): TraceMem { id: TraceMemoryId(0), name: "mem", stride: 8, element_type: TraceUInt { location: TraceMemoryLocation { id: TraceMemoryId(0), depth: 4, stride: 8, start: 0, len: 8, }, name: "mem", ty: UInt<8>, flow: Duplex, }, ports: [ TraceMemPort { name: "r0", bundle: TraceBundle { name: "r0", fields: [ TraceUInt { location: TraceScalarId(9), name: "addr", ty: UInt<2>, flow: Sink, }, TraceBool { location: TraceScalarId(10), name: "en", flow: Sink, }, TraceClock { location: TraceScalarId(11), name: "clk", flow: Sink, }, TraceUInt { location: TraceScalarId(12), name: "data", ty: UInt<8>, flow: Source, }, ], ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, #[hdl(flip)] /* offset = 4 */ data: UInt<8>, }, flow: Sink, }, ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, #[hdl(flip)] /* offset = 4 */ data: UInt<8>, }, }, TraceMemPort { name: "w1", bundle: TraceBundle { name: "w1", fields: [ TraceUInt { location: TraceScalarId(13), name: "addr", ty: UInt<2>, flow: Sink, }, TraceBool { location: TraceScalarId(14), name: "en", flow: Sink, }, TraceClock { location: TraceScalarId(15), name: "clk", flow: Sink, }, TraceUInt { location: TraceScalarId(16), name: "data", ty: UInt<8>, flow: Sink, }, TraceBool { location: TraceScalarId(17), name: "mask", flow: Sink, }, ], ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, /* offset = 4 */ data: UInt<8>, /* offset = 12 */ mask: Bool, }, flow: Sink, }, ty: Bundle { /* offset = 0 */ addr: UInt<2>, /* offset = 2 */ en: Bool, /* offset = 3 */ clk: Clock, /* offset = 4 */ data: UInt<8>, /* offset = 12 */ mask: Bool, }, }, ], array_type: Array, 4>, }, }, trace_writers: [ Running( VcdWriter { finished_init: true, timescale: 1 ps, .. }, ), ], clocks_triggered: [ StatePartIndex(3), StatePartIndex(8), StatePartIndex(15), ], event_queue: EventQueue(EventQueueData { instant: 100 μs, events: {}, }), waiting_sensitivity_sets_by_address: {}, waiting_sensitivity_sets_by_compiled_value: {}, asserts: [], .. }