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compare: programmerjake:e7ee1e862e
Branches Tags
programmerjake:master
libre-chip:master
libre-chip:square-brackets-generics-experiment
libre-chip:runtime-generics
libre-chip:type-deduction
programmerjake:v0.2.0
programmerjake:v0.1.0
libre-chip:v0.2.0
libre-chip:v0.1.0

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de548ba7ca ... e7ee1e862e

Author SHA1 Message Date
Jacob Lifshay
e7ee1e862e
switch ready_valid::queue formal proofs to use formal_global_clock 2026-06-05 00:47:36 -07:00
Jacob Lifshay
5c594cbb68
reimplement fayalite::formal and add support to the simulator 
Add support to the simulator for running hdl asserts/assumes and being
able to write to the formal global clock/reset and all any/all_const/seq that are used.
This allows you to use the exact same HDL code for running a simulation and for running a formal proof.
 2026-06-05 00:46:30 -07:00
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