add support for custom debug/display formatting of #[hdl] structs/enums

also cleans up default debug formatting to use the struct/enum name
(or MaskType<StructName>) instead of the implementation detail type name.

.forgejo/workflows/test.yml

@@ -17,6 +17,8 @@ jobs:
         with:
           save-if: ${{ github.ref == 'refs/heads/master' }}
       - run: rustup override set 1.93.0
+      - run: rustup component add rust-src
+      - run: make -C rocq-demo
       - run: cargo test
       - run: cargo build --tests --features=unstable-doc
       - run: cargo test --doc --features=unstable-doc

crates/fayalite-proc-macros-impl/src/fold.rs

@@ -257,5 +257,6 @@ no_op_fold!(syn::Token![let]);
 no_op_fold!(syn::Token![mut]);
 no_op_fold!(syn::Token![static]);
 no_op_fold!(syn::Token![struct]);
+no_op_fold!(syn::Token![type]);
 no_op_fold!(syn::Token![where]);
 no_op_fold!(usize);

crates/fayalite-proc-macros-impl/src/hdl_bundle.rs

@@ -3,8 +3,9 @@
 use crate::{
     Errors, HdlAttr, PairsIterExt,
     hdl_type_common::{
-        ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedField, ParsedFieldsNamed, ParsedGenerics,
-        SplitForImpl, TypesParser, WrappedInConst, common_derives, get_target,
+        CustomDebugOptions, CustomDebugTrait, ItemOptions, MakeHdlTypeExpr, MaybeParsed,
+        ParsedField, ParsedFieldsNamed, ParsedGenerics, SplitForImpl, TypesParser, WrappedInConst,
+        common_derives, create_struct_debug_impl, get_target,
     },
     kw,
 };
@@ -30,6 +31,7 @@ pub(crate) struct ParsedBundle {
     pub(crate) fields: MaybeParsed<ParsedFieldsNamed, FieldsNamed>,
     pub(crate) field_flips: Vec<Option<HdlAttr<kw::flip, kw::hdl>>>,
     pub(crate) mask_type_ident: Ident,
+    pub(crate) mask_type_name: String,
     pub(crate) mask_type_match_variant_ident: Ident,
     pub(crate) mask_type_sim_value_ident: Ident,
     pub(crate) match_variant_ident: Ident,
@@ -88,6 +90,8 @@ impl ParsedBundle {
             no_runtime_generics: _,
             cmp_eq: _,
             ref get,
+            custom_debug: _,
+            custom_sim_display: _,
         } = options.body;
         if let Some((get, ..)) = get {
             errors.error(get, "#[hdl(get(...))] is not allowed on structs");
@@ -131,6 +135,7 @@ impl ParsedBundle {
             fields,
             field_flips,
             mask_type_ident: format_ident!("__{}__MaskType", ident),
+            mask_type_name: format!("MaskType<{}>", ident),
             mask_type_match_variant_ident: format_ident!("__{}__MaskType__MatchVariant", ident),
             mask_type_sim_value_ident: format_ident!("__{}__MaskType__SimValue", ident),
             match_variant_ident: format_ident!("__{}__MatchVariant", ident),
@@ -448,6 +453,7 @@ impl ToTokens for ParsedBundle {
             fields,
             field_flips,
             mask_type_ident,
+            mask_type_name,
             mask_type_match_variant_ident,
             mask_type_sim_value_ident,
             match_variant_ident,
@@ -464,11 +470,20 @@ impl ToTokens for ParsedBundle {
             no_runtime_generics,
             cmp_eq,
             get: _,
+            custom_debug: _,
+            custom_sim_display,
         } = &options.body;
+        let CustomDebugOptions {
+            type_: custom_debug_type,
+            sim: custom_debug_sim,
+            mask_type: custom_debug_mask_type,
+            mask_sim: custom_debug_mask_sim,
+        } = options.body.custom_debug();
         let target = get_target(target, ident);
+        let struct_name = ident.to_string();
         let mut item_attrs = attrs.clone();
-        item_attrs.push(common_derives(span));
-        ItemStruct {
+        item_attrs.push(common_derives(span, false));
+        let type_struct = ItemStruct {
             attrs: item_attrs,
             vis: vis.clone(),
             struct_token: *struct_token,
@@ -476,8 +491,8 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(fields.clone().into()),
             semi_token: None,
-        }
-        .to_tokens(tokens);
+        };
+        type_struct.to_tokens(tokens);
         let (impl_generics, type_generics, where_clause) = generics.split_for_impl();
         if let (MaybeParsed::Parsed(generics), MaybeParsed::Parsed(fields), None) =
             (generics, fields, no_runtime_generics)
@@ -503,6 +518,9 @@ impl ToTokens for ParsedBundle {
         }
         let mut wrapped_in_const = WrappedInConst::new(tokens, span);
         let tokens = wrapped_in_const.inner();
+        if custom_debug_type.is_none() {
+            create_struct_debug_impl(&type_struct, &struct_name, None).to_tokens(tokens);
+        }
         let builder = Builder {
             vis: vis.clone(),
             struct_token: *struct_token,
@@ -530,9 +548,9 @@ impl ToTokens for ParsedBundle {
         mask_type_builder.to_tokens(tokens);
         let unfilled_mask_type_builder_ty =
             mask_type_builder.builder_struct_ty(|_| BuilderFieldState::Unfilled);
-        ItemStruct {
+        let mask_type_struct = ItemStruct {
             attrs: vec![
-                common_derives(span),
+                common_derives(span, false),
                 parse_quote_spanned! {span=>
                     #[allow(non_camel_case_types, dead_code)]
                 },
@@ -543,17 +561,20 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(mask_type_fields.clone()),
             semi_token: None,
+        };
+        mask_type_struct.to_tokens(tokens);
+        if custom_debug_mask_type.is_none() {
+            create_struct_debug_impl(&mask_type_struct, mask_type_name, None).to_tokens(tokens);
         }
-        .to_tokens(tokens);
         let mut mask_type_match_variant_fields = mask_type_fields.clone();
         for Field { ty, .. } in &mut mask_type_match_variant_fields.named {
             *ty = parse_quote_spanned! {span=>
                 ::fayalite::expr::Expr<#ty>
             };
         }
-        ItemStruct {
+        let mask_type_match_variant_struct = ItemStruct {
             attrs: vec![
-                common_derives(span),
+                common_derives(span, false),
                 parse_quote_spanned! {span=>
                     #[allow(non_camel_case_types, dead_code)]
                 },
@@ -564,17 +585,19 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(mask_type_match_variant_fields),
             semi_token: None,
-        }
-        .to_tokens(tokens);
+        };
+        mask_type_match_variant_struct.to_tokens(tokens);
+        create_struct_debug_impl(&mask_type_match_variant_struct, mask_type_name, None)
+            .to_tokens(tokens);
         let mut match_variant_fields = FieldsNamed::from(fields.clone());
         for Field { ty, .. } in &mut match_variant_fields.named {
             *ty = parse_quote_spanned! {span=>
                 ::fayalite::expr::Expr<#ty>
             };
         }
-        ItemStruct {
+        let match_variant_struct = ItemStruct {
             attrs: vec![
-                common_derives(span),
+                common_derives(span, false),
                 parse_quote_spanned! {span=>
                     #[allow(non_camel_case_types, dead_code)]
                 },
@@ -585,19 +608,19 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(match_variant_fields),
             semi_token: None,
-        }
-        .to_tokens(tokens);
+        };
+        match_variant_struct.to_tokens(tokens);
+        create_struct_debug_impl(&match_variant_struct, &struct_name, None).to_tokens(tokens);
         let mut mask_type_sim_value_fields = mask_type_fields;
         for Field { ty, .. } in &mut mask_type_sim_value_fields.named {
             *ty = parse_quote_spanned! {span=>
                 ::fayalite::sim::value::SimValue<#ty>
             };
         }
-        ItemStruct {
+        let mask_type_sim_value_struct = ItemStruct {
             attrs: vec![
                 parse_quote_spanned! {span=>
                     #[::fayalite::__std::prelude::v1::derive(
-                        ::fayalite::__std::fmt::Debug,
                         ::fayalite::__std::clone::Clone,
                     )]
                 },
@@ -611,19 +634,34 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(mask_type_sim_value_fields),
             semi_token: None,
+        };
+        mask_type_sim_value_struct.to_tokens(tokens);
+        if custom_debug_mask_sim.is_none() {
+            create_struct_debug_impl(
+                &mask_type_struct,
+                mask_type_name,
+                Some(CustomDebugTrait {
+                    trait_path: &parse_quote_spanned! {span=>
+                        ::fayalite::ty::SimValueDebug
+                    },
+                    fn_name: &format_ident!("sim_value_debug", span = span),
+                    this_arg: &parse_quote_spanned! {span=>
+                        value: &<Self as ::fayalite::ty::Type>::SimValue
+                    },
+                }),
+            )
+            .to_tokens(tokens);
         }
-        .to_tokens(tokens);
         let mut sim_value_fields = FieldsNamed::from(fields.clone());
         for Field { ty, .. } in &mut sim_value_fields.named {
             *ty = parse_quote_spanned! {span=>
                 ::fayalite::sim::value::SimValue<#ty>
             };
         }
-        ItemStruct {
+        let sim_value_struct = ItemStruct {
             attrs: vec![
                 parse_quote_spanned! {span=>
                     #[::fayalite::__std::prelude::v1::derive(
-                        ::fayalite::__std::fmt::Debug,
                         ::fayalite::__std::clone::Clone,
                     )]
                 },
@@ -637,8 +675,36 @@ impl ToTokens for ParsedBundle {
             generics: generics.into(),
             fields: Fields::Named(sim_value_fields),
             semi_token: None,
+        };
+        sim_value_struct.to_tokens(tokens);
+        if custom_debug_sim.is_none() {
+            create_struct_debug_impl(
+                &type_struct,
+                &struct_name,
+                Some(CustomDebugTrait {
+                    trait_path: &parse_quote_spanned! {span=>
+                        ::fayalite::ty::SimValueDebug
+                    },
+                    fn_name: &format_ident!("sim_value_debug", span = span),
+                    this_arg: &parse_quote_spanned! {span=>
+                        value: &<Self as ::fayalite::ty::Type>::SimValue
+                    },
+                }),
+            )
+            .to_tokens(tokens);
+        }
+        if custom_sim_display.is_some() {
+            quote_spanned! {span=>
+                #[automatically_derived]
+                impl #impl_generics ::fayalite::__std::fmt::Display for #sim_value_ident #type_generics
+                #where_clause
+                {
+                    fn fmt(&self, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                        <#target #type_generics as ::fayalite::ty::SimValueDisplay>::sim_value_display(self, f)
+                    }
+                }
+            }.to_tokens(tokens);
         }
-        .to_tokens(tokens);
         let this_token = Ident::new("__this", span);
         let fields_token = Ident::new("__fields", span);
         let self_token = Token![self](span);
@@ -820,6 +886,14 @@ impl ToTokens for ParsedBundle {
                 }
             }
             #[automatically_derived]
+            impl #impl_generics ::fayalite::__std::fmt::Debug for #mask_type_sim_value_ident #type_generics
+            #where_clause
+            {
+                fn fmt(&self, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                    <#mask_type_ident #type_generics as ::fayalite::ty::SimValueDebug>::sim_value_debug(self, f)
+                }
+            }
+            #[automatically_derived]
             impl #impl_generics ::fayalite::expr::ValueType for #mask_type_sim_value_ident #type_generics
             #where_clause
             {
@@ -980,6 +1054,14 @@ impl ToTokens for ParsedBundle {
                 }
             }
             #[automatically_derived]
+            impl #impl_generics ::fayalite::__std::fmt::Debug for #sim_value_ident #type_generics
+            #where_clause
+            {
+                fn fmt(&self, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                    <#target #type_generics as ::fayalite::ty::SimValueDebug>::sim_value_debug(self, f)
+                }
+            }
+            #[automatically_derived]
             impl #impl_generics ::fayalite::expr::ValueType for #sim_value_ident #type_generics
             #where_clause
             {

crates/fayalite-proc-macros-impl/src/hdl_enum.rs

@@ -3,8 +3,9 @@
 use crate::{
     Errors, HdlAttr, PairsIterExt,
     hdl_type_common::{
-        ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics, ParsedType, SplitForImpl,
-        TypesParser, WrappedInConst, common_derives, get_target,
+        CustomDebugOptions, ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics, ParsedType,
+        SplitForImpl, TypesParser, WrappedInConst, common_derives, create_struct_debug_impl,
+        get_target,
     },
     kw,
 };
@@ -160,6 +161,8 @@ impl ParsedEnum {
             no_runtime_generics: _,
             cmp_eq,
             ref get,
+            custom_debug: _,
+            custom_sim_display: _,
         } = options.body;
         if let Some((cmp_eq,)) = cmp_eq {
             errors.error(cmp_eq, "#[hdl(cmp_eq)] is not yet implemented for enums");
@@ -167,6 +170,24 @@ impl ParsedEnum {
         if let Some((get, ..)) = get {
             errors.error(get, "#[hdl(get(...))] is not allowed on enums");
         }
+        let CustomDebugOptions {
+            type_: _,
+            sim: _,
+            mask_type,
+            mask_sim,
+        } = options.body.custom_debug();
+        if let Some((mask_type,)) = mask_type {
+            errors.error(
+                mask_type,
+                "#[hdl(custom_debug(mask_type)] is not allowed on enums",
+            );
+        }
+        if let Some((mask_sim,)) = mask_sim {
+            errors.error(
+                mask_sim,
+                "#[hdl(custom_debug(mask_sim)] is not allowed on enums",
+            );
+        }
         attrs.retain(|attr| {
             if attr.path().is_ident("repr") {
                 errors.error(attr, "#[repr] is not supported on #[hdl] enums");
@@ -230,10 +251,19 @@ impl ToTokens for ParsedEnum {
             no_runtime_generics,
             cmp_eq: _, // TODO: implement cmp_eq for enums
             get: _,
+            custom_debug: _,
+            custom_sim_display,
         } = &options.body;
+        let CustomDebugOptions {
+            type_: custom_debug_type,
+            sim: custom_debug_sim,
+            mask_type: _,
+            mask_sim: _,
+        } = options.body.custom_debug();
         let target = get_target(target, ident);
+        let enum_name = ident.to_string();
         let mut struct_attrs = attrs.clone();
-        struct_attrs.push(common_derives(span));
+        struct_attrs.push(common_derives(span, false));
         struct_attrs.push(parse_quote_spanned! {span=>
             #[allow(non_snake_case)]
         });
@@ -273,7 +303,7 @@ impl ToTokens for ParsedEnum {
                 }
             },
         ));
-        ItemStruct {
+        let type_struct = ItemStruct {
             attrs: struct_attrs,
             vis: vis.clone(),
             struct_token: Token![struct](enum_token.span),
@@ -288,8 +318,8 @@ impl ToTokens for ParsedEnum {
                 })
             },
             semi_token: None,
-        }
-        .to_tokens(tokens);
+        };
+        type_struct.to_tokens(tokens);
         let (impl_generics, type_generics, where_clause) = generics.split_for_impl();
         if let (MaybeParsed::Parsed(generics), None) = (generics, no_runtime_generics) {
             generics.make_runtime_generics(tokens, vis, ident, &target, |context| {
@@ -373,6 +403,9 @@ impl ToTokens for ParsedEnum {
             }
             .to_tokens(tokens);
         }
+        if custom_debug_type.is_none() {
+            create_struct_debug_impl(&type_struct, &enum_name, None).to_tokens(tokens);
+        }
         let mut enum_attrs = attrs.clone();
         enum_attrs.push(parse_quote_spanned! {span=>
             #[allow(dead_code, non_camel_case_types)]
@@ -453,7 +486,6 @@ impl ToTokens for ParsedEnum {
         let mut enum_attrs = attrs.clone();
         enum_attrs.push(parse_quote_spanned! {span=>
             #[::fayalite::__std::prelude::v1::derive(
-                ::fayalite::__std::fmt::Debug,
                 ::fayalite::__std::clone::Clone,
             )]
         });
@@ -838,6 +870,74 @@ impl ToTokens for ParsedEnum {
                     },
                 )),
         );
+        if custom_debug_sim.is_none() {
+            let debug_match_arms = Vec::from_iter(
+                variants
+                    .iter()
+                    .map(
+                        |ParsedVariant {
+                             attrs: _,
+                             options: _,
+                             ident,
+                             field,
+                         }| {
+                            let variant_name = ident.to_string();
+                            if let Some(_) = field {
+                                quote_spanned! {span=>
+                                    #sim_value_ident::#ident(field, _) => {
+                                        f.debug_tuple(#variant_name).field(field).finish()
+                                    }
+                                }
+                            } else {
+                                quote_spanned! {span=>
+                                    #sim_value_ident::#ident(_) => {
+                                        f.write_str(#variant_name)
+                                    }
+                                }
+                            }
+                        },
+                    )
+                    .chain(sim_value_unknown_variant_name.as_ref().map(
+                        |sim_value_unknown_variant_name| {
+                            let sim_value_unknown_variant_name_str =
+                                sim_value_unknown_variant_name.to_string();
+                            quote_spanned! {span=>
+                                #sim_value_ident::#sim_value_unknown_variant_name(_) => {
+                                    f.write_str(#sim_value_unknown_variant_name_str)
+                                }
+                            }
+                        },
+                    )),
+            );
+            quote_spanned! {span=>
+                #[automatically_derived]
+                impl #impl_generics ::fayalite::ty::SimValueDebug for #target #type_generics
+                #where_clause
+                {
+                    fn sim_value_debug(
+                        value: &<Self as ::fayalite::ty::Type>::SimValue,
+                        f: &mut ::fayalite::__std::fmt::Formatter<'_>,
+                    ) -> ::fayalite::__std::fmt::Result {
+                        match value {
+                            #(#debug_match_arms)*
+                        }
+                    }
+                }
+            }
+            .to_tokens(tokens);
+        }
+        if custom_sim_display.is_some() {
+            quote_spanned! {span=>
+                #[automatically_derived]
+                impl #impl_generics ::fayalite::__std::fmt::Display for #sim_value_ident #type_generics
+                #where_clause
+                {
+                    fn fmt(&self, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                        <#target #type_generics as ::fayalite::ty::SimValueDisplay>::sim_value_display(self, f)
+                    }
+                }
+            }.to_tokens(tokens);
+        }
         let variants_len = variants.len();
         quote_spanned! {span=>
             #[automatically_derived]
@@ -934,6 +1034,14 @@ impl ToTokens for ParsedEnum {
                 }
             }
             #[automatically_derived]
+            impl #impl_generics ::fayalite::__std::fmt::Debug for #sim_value_ident #type_generics
+            #where_clause
+            {
+                fn fmt(&self, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                    <#target #type_generics as ::fayalite::ty::SimValueDebug>::sim_value_debug(self, f)
+                }
+            }
+            #[automatically_derived]
             impl #impl_generics ::fayalite::sim::value::ToSimValueWithType<#target #type_generics>
             for #sim_value_ident #type_generics
             #where_clause

crates/fayalite-proc-macros-impl/src/hdl_type_alias.rs

@@ -215,6 +215,8 @@ impl ParsedTypeAlias {
             no_runtime_generics,
             cmp_eq,
             get: _,
+            ref custom_debug,
+            custom_sim_display,
         } = options.body;
         if let Some((no_static,)) = no_static {
             errors.error(no_static, "no_static is not valid on type aliases");
@@ -234,6 +236,15 @@ impl ParsedTypeAlias {
         if let Some((cmp_eq,)) = cmp_eq {
             errors.error(cmp_eq, "cmp_eq is not valid on type aliases");
         }
+        if let Some((custom_debug, _, _)) = custom_debug {
+            errors.error(custom_debug, "custom_debug is not valid on type aliases");
+        }
+        if let Some((custom_sim_display,)) = custom_sim_display {
+            errors.error(
+                custom_sim_display,
+                "custom_sim_display is not valid on type aliases",
+            );
+        }
         if let Some((custom_bounds,)) = custom_bounds {
             errors.error(
                 custom_bounds,
@@ -287,6 +298,8 @@ impl ParsedTypeAlias {
             no_runtime_generics: _,
             cmp_eq,
             ref mut get,
+            ref custom_debug,
+            custom_sim_display,
         } = options.body;
         if let Some(get) = get.take() {
             return Self::parse_phantom_const_accessor(
@@ -311,6 +324,15 @@ impl ParsedTypeAlias {
         if let Some((cmp_eq,)) = cmp_eq {
             errors.error(cmp_eq, "cmp_eq is not valid on type aliases");
         }
+        if let Some((custom_debug, _, _)) = custom_debug {
+            errors.error(custom_debug, "custom_debug is not valid on type aliases");
+        }
+        if let Some((custom_sim_display,)) = custom_sim_display {
+            errors.error(
+                custom_sim_display,
+                "custom_sim_display is not valid on type aliases",
+            );
+        }
         let generics = if custom_bounds.is_some() {
             MaybeParsed::Unrecognized(generics)
         } else if let Some(generics) = errors.ok(ParsedGenerics::parse(&mut generics)) {
@@ -356,6 +378,8 @@ impl ToTokens for ParsedTypeAlias {
                     no_runtime_generics,
                     cmp_eq: _,
                     get: _,
+                    custom_debug: _,
+                    custom_sim_display: _,
                 } = &options.body;
                 let target = get_target(target, ident);
                 let mut type_attrs = attrs.clone();
@@ -402,6 +426,8 @@ impl ToTokens for ParsedTypeAlias {
                     no_runtime_generics: _,
                     cmp_eq: _,
                     get: _,
+                    custom_debug: _,
+                    custom_sim_display: _,
                 } = &options.body;
                 let span = ident.span();
                 let mut type_attrs = attrs.clone();
@@ -427,7 +453,7 @@ impl ToTokens for ParsedTypeAlias {
                     format_ident!("__{}__GenericsAccumulation", ident);
                 ItemStruct {
                     attrs: vec![
-                        common_derives(span),
+                        common_derives(span, true),
                         parse_quote_spanned! {span=>
                             #[allow(non_camel_case_types)]
                         },

crates/fayalite-proc-macros-impl/src/hdl_type_common.rs

@@ -7,10 +7,10 @@ use std::{collections::HashMap, fmt, mem};
 use syn::{
     AngleBracketedGenericArguments, Attribute, Block, ConstParam, Expr, ExprBlock, ExprGroup,
     ExprIndex, ExprParen, ExprPath, ExprTuple, Field, FieldMutability, Fields, FieldsNamed,
-    FieldsUnnamed, GenericArgument, GenericParam, Generics, Ident, ImplGenerics, Index, ItemStruct,
-    Path, PathArguments, PathSegment, PredicateType, QSelf, Stmt, Token, TraitBound, Turbofish,
-    Type, TypeGenerics, TypeGroup, TypeParam, TypeParamBound, TypeParen, TypePath, TypeTuple,
-    Visibility, WhereClause, WherePredicate,
+    FieldsUnnamed, FnArg, GenericArgument, GenericParam, Generics, Ident, ImplGenerics, Index,
+    ItemStruct, Path, PathArguments, PathSegment, PredicateType, QSelf, Stmt, Token, TraitBound,
+    Turbofish, Type, TypeGenerics, TypeGroup, TypeParam, TypeParamBound, TypeParen, TypePath,
+    TypeTuple, Visibility, WhereClause, WherePredicate,
     parse::{Parse, ParseStream},
     parse_quote, parse_quote_spanned,
     punctuated::{Pair, Punctuated},
@@ -18,6 +18,17 @@ use syn::{
     token::{Brace, Bracket, Paren},
 };
 
+crate::options! {
+    #[options = CustomDebugOptions]
+    #[no_ident_fragment]
+    pub(crate) enum CustomDebugOption {
+        Type(type_),
+        Sim(sim),
+        MaskType(mask_type),
+        MaskSim(mask_sim),
+    }
+}
+
 crate::options! {
     #[options = ItemOptions]
     pub(crate) enum ItemOption {
@@ -28,6 +39,8 @@ crate::options! {
         NoRuntimeGenerics(no_runtime_generics),
         CmpEq(cmp_eq),
         Get(get, Expr),
+        CustomDebug(custom_debug, CustomDebugOptions),
+        CustomSimDisplay(custom_sim_display),
     }
 }
 
@@ -41,8 +54,36 @@ impl ItemOptions {
         {
             self.no_static = Some((kw::no_static(custom_bounds.span),));
         }
+        if let Some((kw, _, custom_debug)) = &mut self.custom_debug {
+            if let CustomDebugOptions {
+                type_: None,
+                sim: None,
+                mask_type: None,
+                mask_sim: None,
+            } = custom_debug
+            {
+                *custom_debug = CustomDebugOptions {
+                    type_: Some((kw::type_(kw.span),)),
+                    sim: Some((kw::sim(kw.span),)),
+                    mask_type: None,
+                    mask_sim: None,
+                };
+            }
+        }
         Ok(())
     }
+    pub(crate) fn custom_debug(&self) -> &CustomDebugOptions {
+        self.custom_debug.as_ref().map(|v| &v.2).unwrap_or(
+            const {
+                &CustomDebugOptions {
+                    type_: None,
+                    sim: None,
+                    mask_type: None,
+                    mask_sim: None,
+                }
+            },
+        )
+    }
 }
 
 pub(crate) struct WrappedInConst<'a> {
@@ -84,10 +125,17 @@ pub(crate) fn get_target(target: &Option<(kw::target, Paren, Path)>, item_ident:
     }
 }
 
-pub(crate) fn common_derives(span: Span) -> Attribute {
+pub(crate) fn common_derives(span: Span, include_debug: bool) -> Attribute {
+    let debug = include_debug
+        .then(|| {
+            quote_spanned! {span=>
+                ::fayalite::__std::fmt::Debug
+            }
+        })
+        .into_iter();
     parse_quote_spanned! {span=>
         #[::fayalite::__std::prelude::v1::derive(
-            ::fayalite::__std::fmt::Debug,
+            #(#debug,)*
             ::fayalite::__std::cmp::Eq,
             ::fayalite::__std::cmp::PartialEq,
             ::fayalite::__std::hash::Hash,
@@ -2975,7 +3023,7 @@ impl ParsedGenerics {
         let span = ident.span();
         ItemStruct {
             attrs: vec![
-                common_derives(span),
+                common_derives(span, true),
                 parse_quote_spanned! {span=>
                     #[allow(non_camel_case_types)]
                 },
@@ -4733,3 +4781,109 @@ impl ParsedVisibility {
             .map(|ord| if ord.is_lt() { self } else { other })
     }
 }
+
+pub(crate) struct CustomDebugTrait<'a> {
+    pub(crate) trait_path: &'a Path,
+    pub(crate) fn_name: &'a Ident,
+    pub(crate) this_arg: &'a FnArg,
+}
+
+#[must_use]
+pub(crate) fn create_struct_debug_impl(
+    item_struct: &ItemStruct,
+    debug_struct_name: &str,
+    custom_debug_trait: Option<CustomDebugTrait<'_>>,
+) -> TokenStream {
+    let ident = &item_struct.ident;
+    let span = ident.span();
+    let (impl_generics, type_generics, where_clause) = item_struct.generics.split_for_impl();
+    let trait_path;
+    let fn_name;
+    let this_arg;
+    let CustomDebugTrait {
+        trait_path,
+        fn_name,
+        this_arg,
+    } = match custom_debug_trait {
+        Some(v) => v,
+        None => {
+            trait_path = parse_quote_spanned! {span=>
+                ::fayalite::__std::fmt::Debug
+            };
+            fn_name = parse_quote_spanned! {span=>
+                fmt
+            };
+            this_arg = parse_quote_spanned! {span=>
+                &self
+            };
+            CustomDebugTrait {
+                trait_path: &trait_path,
+                fn_name: &fn_name,
+                this_arg: &this_arg,
+            }
+        }
+    };
+    let this_arg_name = match this_arg {
+        FnArg::Receiver(this_arg) => this_arg.self_token.to_token_stream(),
+        FnArg::Typed(this_arg) => match &*this_arg.pat {
+            syn::Pat::Ident(pat_ident) => pat_ident.ident.to_token_stream(),
+            _ => unreachable!(),
+        },
+    };
+    match &item_struct.fields {
+        Fields::Named(fields) => {
+            let field_idents = fields
+                .named
+                .iter()
+                .map(|v| v.ident.as_ref().expect("known to have field name"));
+            let field_names = field_idents.clone().map(|v| v.to_string());
+            quote_spanned! {span=>
+                #[automatically_derived]
+                impl #impl_generics #trait_path for #ident #type_generics
+                #where_clause
+                {
+                    fn #fn_name(#this_arg, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                        let _ = #this_arg_name;
+                        f.debug_struct(#debug_struct_name)
+                            #(.field(#field_names, &#this_arg_name.#field_idents))*
+                            .finish()
+                    }
+                }
+            }
+        }
+        Fields::Unnamed(fields) => {
+            let field_members = fields
+                .unnamed
+                .iter()
+                .enumerate()
+                .map(|(index, _)| syn::Index {
+                    index: index as _,
+                    span,
+                });
+            quote_spanned! {span=>
+                #[automatically_derived]
+                impl #impl_generics #trait_path for #ident #type_generics
+                #where_clause
+                {
+                    fn #fn_name(#this_arg, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                        let _ = #this_arg_name;
+                        f.debug_tuple(#debug_struct_name)
+                            #(.field(&#this_arg_name.#field_members))*
+                            .finish()
+                    }
+                }
+            }
+        }
+        Fields::Unit => quote_spanned! {ident.span()=>
+            #[automatically_derived]
+            impl #impl_generics #trait_path for #ident #type_generics
+            #where_clause
+            {
+                fn #fn_name(#this_arg, f: &mut ::fayalite::__std::fmt::Formatter<'_>) -> ::fayalite::__std::fmt::Result {
+                    let _ = #this_arg_name;
+                    f.write_str(#debug_struct_name)
+                }
+            }
+        },
+    }
+}

crates/fayalite-proc-macros-impl/src/lib.rs

@@ -42,6 +42,7 @@ pub(crate) trait CustomToken:
 
 mod kw {
     pub(crate) use syn::token::Extern as extern_;
+    pub(crate) use syn::token::Type as type_;
 
     macro_rules! custom_keyword {
         ($kw:ident) => {
@@ -75,6 +76,8 @@ mod kw {
     custom_keyword!(cmp_eq);
     custom_keyword!(connect_inexact);
     custom_keyword!(custom_bounds);
+    custom_keyword!(custom_debug);
+    custom_keyword!(custom_sim_display);
     custom_keyword!(flip);
     custom_keyword!(get);
     custom_keyword!(hdl);
@@ -83,6 +86,8 @@ mod kw {
     custom_keyword!(input);
     custom_keyword!(instance);
     custom_keyword!(m);
+    custom_keyword!(mask_sim);
+    custom_keyword!(mask_type);
     custom_keyword!(memory);
     custom_keyword!(memory_array);
     custom_keyword!(memory_with_init);

crates/fayalite/src/array.rs

@@ -13,13 +13,13 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, MatchVariantWithoutScope, OpaqueSimValueSlice, OpaqueSimValueWriter,
-        OpaqueSimValueWritten, StaticType, Type, TypeProperties, TypeWithDeref,
+        OpaqueSimValueWritten, SimValueDebug, StaticType, Type, TypeProperties, TypeWithDeref,
         serde_impls::SerdeCanonicalType,
     },
     util::ConstUsize,
 };
 use serde::{Deserialize, Deserializer, Serialize, Serializer, de::Error};
-use std::{borrow::Cow, iter::FusedIterator, ops::Index};
+use std::{borrow::Cow, fmt, iter::FusedIterator, ops::Index};
 
 #[derive(Copy, Clone, PartialEq, Eq, Hash)]
 pub struct ArrayType<T: Type = CanonicalType, Len: Size = DynSize> {
@@ -28,8 +28,8 @@ pub struct ArrayType<T: Type = CanonicalType, Len: Size = DynSize> {
     type_properties: TypeProperties,
 }
 
-impl<T: Type, Len: Size> std::fmt::Debug for ArrayType<T, Len> {
-    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
+impl<T: Type, Len: Size> fmt::Debug for ArrayType<T, Len> {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         write!(f, "Array<{:?}, {}>", self.element, self.len())
     }
 }
@@ -182,6 +182,15 @@ impl<T: Type + Visit<State>, Len: Size, State: Visitor + ?Sized> Visit<State>
     }
 }
 
+impl<T: Type, Len: Size> SimValueDebug for ArrayType<T, Len> {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl<T: Type, Len: Size> Type for ArrayType<T, Len> {
     type BaseType = Array;
     type MaskType = ArrayType<T::MaskType, Len>;

crates/fayalite/src/bundle.rs

@@ -14,8 +14,8 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, MatchVariantWithoutScope, OpaqueSimValue, OpaqueSimValueSize,
-        OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten, StaticType, Type,
-        TypeProperties, TypeWithDeref, impl_match_variant_as_self,
+        OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten, SimValueDebug,
+        StaticType, Type, TypeProperties, TypeWithDeref, impl_match_variant_as_self,
     },
     util::HashMap,
 };
@@ -271,6 +271,15 @@ impl Type for Bundle {
     }
 }
 
+impl SimValueDebug for Bundle {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 pub trait BundleType: Type<BaseType = Bundle> {
     type Builder: Default;
     fn fields(&self) -> Interned<[BundleField]>;
@@ -471,6 +480,14 @@ macro_rules! impl_tuples {
                 #[var($var)]
             })*]
         }
+        impl<$($T: Type,)*> SimValueDebug for ($($T,)*) {
+            fn sim_value_debug(
+                value: &<Self as Type>::SimValue,
+                f: &mut fmt::Formatter<'_>,
+            ) -> fmt::Result {
+                fmt::Debug::fmt(value, f)
+            }
+        }
         impl<$($T: Type,)*> Type for ($($T,)*) {
             type BaseType = Bundle;
             type MaskType = ($($T::MaskType,)*);
@@ -773,6 +790,15 @@ impl_tuples! {
     ]
 }
 
+impl<T: ?Sized + Send + Sync + 'static> SimValueDebug for PhantomData<T> {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl<T: ?Sized + Send + Sync + 'static> Type for PhantomData<T> {
     type BaseType = Bundle;
     type MaskType = ();

crates/fayalite/src/clock.rs

@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
+
 use crate::{
     expr::{Expr, ValueType},
     hdl,
@@ -9,10 +10,12 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, OpaqueSimValueSize, OpaqueSimValueSlice, OpaqueSimValueWriter,
-        OpaqueSimValueWritten, StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        OpaqueSimValueWritten, SimValueDebug, StaticType, Type, TypeProperties,
+        impl_match_variant_as_self,
     },
 };
 use bitvec::{bits, order::Lsb0};
+use std::fmt;
 
 #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug, Default)]
 pub struct Clock;
@@ -69,6 +72,15 @@ impl Type for Clock {
     }
 }
 
+impl SimValueDebug for Clock {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl Clock {
     pub fn type_properties(self) -> TypeProperties {
         Self::TYPE_PROPERTIES

crates/fayalite/src/enum_.rs

@@ -14,8 +14,8 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, MatchVariantAndInactiveScope, OpaqueSimValue, OpaqueSimValueSize,
-        OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten, StaticType, Type,
-        TypeProperties,
+        OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten, SimValueDebug,
+        StaticType, Type, TypeProperties,
     },
     util::HashMap,
 };
@@ -410,6 +410,15 @@ impl Type for Enum {
     }
 }
 
+impl SimValueDebug for Enum {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 #[derive(Clone, PartialEq, Eq, Hash, Debug, Default)]
 pub struct EnumPaddingSimValue {
     bits: Option<UIntValue>,

crates/fayalite/src/int.rs

@@ -15,8 +15,8 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, FillInDefaultedGenerics, OpaqueSimValueSize, OpaqueSimValueSlice,
-        OpaqueSimValueWriter, OpaqueSimValueWritten, StaticType, Type, TypeProperties,
-        impl_match_variant_as_self,
+        OpaqueSimValueWriter, OpaqueSimValueWritten, SimValueDebug, SimValueDisplay, StaticType,
+        Type, TypeProperties, impl_match_variant_as_self,
     },
     util::{ConstBool, ConstUsize, GenericConstBool, GenericConstUsize, interned_bit, slice_range},
 };
@@ -1019,6 +1019,24 @@ macro_rules! impl_int {
             }
         }
 
+        impl<Width: Size> SimValueDebug for $name<Width> {
+            fn sim_value_debug(
+                value: &<Self as Type>::SimValue,
+                f: &mut fmt::Formatter<'_>,
+            ) -> fmt::Result {
+                fmt::Debug::fmt(value, f)
+            }
+        }
+
+        impl<Width: Size> SimValueDisplay for $name<Width> {
+            fn sim_value_display(
+                value: &<Self as Type>::SimValue,
+                f: &mut fmt::Formatter<'_>,
+            ) -> fmt::Result {
+                fmt::Display::fmt(value, f)
+            }
+        }
+
         impl<Width: KnownSize> Default for $name<Width> {
             fn default() -> Self {
                 Self::TYPE
@@ -1899,6 +1917,15 @@ impl Type for Bool {
     }
 }
 
+impl SimValueDebug for Bool {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl StaticType for Bool {
     const TYPE: Self = Bool;
     const MASK_TYPE: Self::MaskType = Bool;

crates/fayalite/src/int/uint_in_range.rs

@@ -14,7 +14,7 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten,
-        StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        SimValueDebug, StaticType, Type, TypeProperties, impl_match_variant_as_self,
     },
 };
 use bitvec::{order::Lsb0, view::BitView};
@@ -94,6 +94,15 @@ impl Type for UIntInRangeMaskType {
     }
 }
 
+impl SimValueDebug for UIntInRangeMaskType {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl BundleType for UIntInRangeMaskType {
     type Builder = NoBuilder;
 
@@ -339,6 +348,15 @@ macro_rules! define_uint_in_range_type {
             }
         }
 
+        impl<Start: Size, End: Size> SimValueDebug for $UIntInRangeType<Start, End> {
+            fn sim_value_debug(
+                value: &<Self as Type>::SimValue,
+                f: &mut fmt::Formatter<'_>,
+            ) -> fmt::Result {
+                fmt::Debug::fmt(value, f)
+            }
+        }
+
         impl<Start: Size, End: Size> fmt::Debug for $UIntInRangeType<Start, End> {
             fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
                 let Self { value, range } = self;

crates/fayalite/src/phantom_const.rs

@@ -9,7 +9,7 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, OpaqueSimValueSlice, OpaqueSimValueWriter, OpaqueSimValueWritten,
-        StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        SimValueDebug, StaticType, Type, TypeProperties, impl_match_variant_as_self,
         serde_impls::{SerdeCanonicalType, SerdePhantomConst},
     },
 };
@@ -327,6 +327,15 @@ impl<T: ?Sized + PhantomConstValue> Type for PhantomConst<T> {
     }
 }
 
+impl<T: ?Sized + PhantomConstValue> SimValueDebug for PhantomConst<T> {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl<T: ?Sized + PhantomConstValue> Default for PhantomConst<T>
 where
     Interned<T>: Default,

crates/fayalite/src/reset.rs

@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
+
 use crate::{
     clock::Clock,
     expr::{CastToImpl, Expr, ValueType},
@@ -8,11 +9,13 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, OpaqueSimValueSize, OpaqueSimValueSlice, OpaqueSimValueWriter,
-        OpaqueSimValueWritten, StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        OpaqueSimValueWritten, SimValueDebug, StaticType, Type, TypeProperties,
+        impl_match_variant_as_self,
     },
     util::ConstUsize,
 };
 use bitvec::{bits, order::Lsb0};
+use std::fmt;
 
 mod sealed {
     pub trait ResetTypeSealed {}
@@ -100,6 +103,15 @@ macro_rules! reset_type {
             }
         }
 
+        impl SimValueDebug for $name {
+            fn sim_value_debug(
+                value: &<Self as Type>::SimValue,
+                f: &mut fmt::Formatter<'_>,
+            ) -> fmt::Result {
+                fmt::Debug::fmt(value, f)
+            }
+        }
+
         impl $name {
             pub fn type_properties(self) -> TypeProperties {
                 Self::TYPE_PROPERTIES

crates/fayalite/src/sim.rs

@@ -828,6 +828,7 @@ where
 #[derive(Clone, PartialEq, Eq, Hash, Debug)]
 pub(crate) struct SimTrace<K, S> {
     kind: K,
+    maybe_changed: bool,
     state: S,
     last_state: S,
 }
@@ -848,12 +849,14 @@ impl<K: fmt::Debug> SimTraceDebug<TraceScalarId> for SimTrace<K, ()> {
     fn fmt(&self, id: TraceScalarId, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         let Self {
             kind,
+            maybe_changed,
             state,
             last_state,
         } = self;
         f.debug_struct("SimTrace")
             .field("id", &id)
             .field("kind", kind)
+            .field("maybe_changed", maybe_changed)
             .field("state", state)
             .field("last_state", last_state)
             .finish()
@@ -864,12 +867,14 @@ impl<K: fmt::Debug> SimTraceDebug<TraceScalarId> for SimTrace<K, SimTraceState>
     fn fmt(&self, id: TraceScalarId, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         let Self {
             kind,
+            maybe_changed,
             state,
             last_state,
         } = self;
         f.debug_struct("SimTrace")
             .field("id", &id)
             .field("kind", kind)
+            .field("maybe_changed", maybe_changed)
             .field("state", state)
             .field("last_state", last_state)
             .finish()
@@ -1295,10 +1300,16 @@ impl SimulationModuleState {
                 if !self.uninitialized_ios.is_empty() {
                     match which_module {
                         WhichModule::Main => {
-                            panic!("can't read from an output before initializing all inputs");
+                            panic!(
+                                "can't read from an output before initializing all inputs\nuninitialized_ios={:#?}",
+                                SortedSetDebug(&self.uninitialized_ios),
+                            );
                         }
                         WhichModule::Extern { .. } => {
-                            panic!("can't read from an input before initializing all outputs");
+                            panic!(
+                                "can't read from an input before initializing all outputs\nuninitialized_ios={:#?}",
+                                SortedSetDebug(&self.uninitialized_ios),
+                            );
                         }
                     }
                 }
@@ -2072,10 +2083,12 @@ impl SimulationImpl {
             traces: SimTraces(Box::from_iter(compiled.traces.0.iter().map(
                 |&SimTrace {
                      kind,
+                     maybe_changed: _,
                      state: _,
                      last_state: _,
                  }| SimTrace {
                     kind,
+                    maybe_changed: true,
                     state: kind.make_state(),
                     last_state: kind.make_state(),
                 },
@@ -2120,13 +2133,16 @@ impl SimulationImpl {
             id,
             &SimTrace {
                 kind,
+                maybe_changed,
                 ref state,
                 ref last_state,
             },
         ) in self.traces.0.iter().enumerate()
         {
-            if ONLY_IF_CHANGED && state == last_state {
-                continue;
+            if ONLY_IF_CHANGED {
+                if !(maybe_changed && state != last_state) {
+                    continue;
+                }
             }
             let id = TraceScalarId(id);
             match kind {
@@ -2187,10 +2203,45 @@ impl SimulationImpl {
     fn read_traces<const IS_INITIAL_STEP: bool>(&mut self) {
         for &mut SimTrace {
             kind,
+            ref mut maybe_changed,
             ref mut state,
             ref mut last_state,
         } in &mut self.traces.0
         {
+            let new_maybe_changed = match kind {
+                SimTraceKind::BigUInt { index, ty: _ }
+                | SimTraceKind::BigSInt { index, ty: _ }
+                | SimTraceKind::BigBool { index }
+                | SimTraceKind::BigAsyncReset { index }
+                | SimTraceKind::BigSyncReset { index }
+                | SimTraceKind::BigClock { index } => self
+                    .state
+                    .big_slots
+                    .state_index_fetch_and_clear_maybe_modified_flag(index),
+                SimTraceKind::SmallUInt { index, ty: _ }
+                | SimTraceKind::SmallSInt { index, ty: _ }
+                | SimTraceKind::SmallBool { index }
+                | SimTraceKind::SmallAsyncReset { index }
+                | SimTraceKind::SmallSyncReset { index }
+                | SimTraceKind::SmallClock { index }
+                | SimTraceKind::EnumDiscriminant { index, ty: _ } => self
+                    .state
+                    .small_slots
+                    .state_index_fetch_and_clear_maybe_modified_flag(index),
+                SimTraceKind::SimOnly { index, ty: _ } => self
+                    .state
+                    .sim_only_slots
+                    .state_index_fetch_and_clear_maybe_modified_flag(index),
+                SimTraceKind::PhantomConst { ty: _ } => IS_INITIAL_STEP,
+            };
+            if !new_maybe_changed && !IS_INITIAL_STEP {
+                if *maybe_changed {
+                    last_state.clone_from(state);
+                }
+                *maybe_changed = false;
+                continue;
+            }
+            *maybe_changed = new_maybe_changed;
             if !IS_INITIAL_STEP {
                 mem::swap(state, last_state);
             }

crates/fayalite/src/sim/compiler.rs

@@ -2234,6 +2234,7 @@ impl Compiler {
         let id = TraceScalarId(self.traces.0.len());
         self.traces.0.push(SimTrace {
             kind,
+            maybe_changed: true,
             state: (),
             last_state: (),
         });
@@ -4087,6 +4088,15 @@ impl Compiler {
             let init = self.compiled_expr_to_value(init, reg.source_location());
             (reg.clock_domain().rst, init)
         });
+
+        // next value defaults to current value
+        self.compile_simple_connect(
+            [].intern_slice(),
+            value.into(),
+            value,
+            reg.source_location(),
+        );
+
         self.compile_reg(
             clk,
             reset_and_init,

crates/fayalite/src/sim/interpreter.rs

@@ -17,12 +17,11 @@ use bitvec::slice::BitSlice;
 use num_bigint::BigInt;
 use num_traits::{One, Signed, ToPrimitive, Zero};
 use std::{
-    borrow::BorrowMut,
     convert::Infallible,
     fmt::{self, Write},
     hash::Hash,
     marker::PhantomData,
-    ops::{ControlFlow, Deref, DerefMut, Index, IndexMut},
+    ops::{ControlFlow, Deref, Index, IndexMut},
 };
 use vec_map::VecMap;
 
@@ -915,6 +914,12 @@ impl<K: StatePartKind> StatePart<K> {
             value: K::borrow_state(&mut self.value),
         }
     }
+    pub(crate) fn state_index_fetch_and_clear_maybe_modified_flag(
+        &mut self,
+        part_index: StatePartIndex<K>,
+    ) -> bool {
+        K::state_index_fetch_and_clear_maybe_modified_flag(&mut self.value, part_index)
+    }
 }
 
 #[derive(Clone, PartialEq, Eq, Hash, Debug)]
@@ -922,56 +927,38 @@ pub(crate) struct BorrowedStatePart<'a, K: StatePartKind> {
     pub(crate) value: K::BorrowedState<'a>,
 }
 
-impl<
-    'a,
-    K: StatePartKind<
-        BorrowedState<'a>: DerefMut<Target: IndexMut<usize, Output = T> + BorrowMut<[T]>>,
-    >,
-    T,
-> BorrowedStatePart<'a, K>
-{
+impl<K: StatePartKind> BorrowedStatePart<'_, K> {
     pub(crate) fn get_disjoint_mut<const N: usize>(
         &mut self,
         indexes: [StatePartIndex<K>; N],
-    ) -> [&mut T; N] {
-        (*self.value)
-            .borrow_mut()
-            .get_disjoint_mut(indexes.map(|v| v.value as usize))
-            .expect("indexes are disjoint")
+    ) -> [&mut K::StateElement; N] {
+        K::borrowed_state_get_disjoint_mut(&mut self.value, indexes)
     }
 }
 
-impl<K: StatePartKind<State: Deref<Target: Index<usize, Output = T>>>, T> Index<StatePartIndex<K>>
-    for StatePart<K>
-{
-    type Output = T;
+impl<K: StatePartKind> Index<StatePartIndex<K>> for StatePart<K> {
+    type Output = K::StateElement;
     fn index(&self, index: StatePartIndex<K>) -> &Self::Output {
-        &self.value[index.value as usize]
+        K::state_index(&self.value, index)
     }
 }
 
-impl<K: StatePartKind<State: DerefMut<Target: IndexMut<usize, Output = T>>>, T>
-    IndexMut<StatePartIndex<K>> for StatePart<K>
-{
+impl<K: StatePartKind> IndexMut<StatePartIndex<K>> for StatePart<K> {
     fn index_mut(&mut self, index: StatePartIndex<K>) -> &mut Self::Output {
-        &mut self.value[index.value as usize]
+        K::state_index_mut(&mut self.value, index)
     }
 }
 
-impl<'a, K: StatePartKind<BorrowedState<'a>: Deref<Target: Index<usize, Output = T>>>, T>
-    Index<StatePartIndex<K>> for BorrowedStatePart<'a, K>
-{
-    type Output = T;
+impl<K: StatePartKind> Index<StatePartIndex<K>> for BorrowedStatePart<'_, K> {
+    type Output = K::StateElement;
     fn index(&self, index: StatePartIndex<K>) -> &Self::Output {
-        &self.value[index.value as usize]
+        K::borrowed_state_index(&self.value, index)
     }
 }
 
-impl<'a, K: StatePartKind<BorrowedState<'a>: DerefMut<Target: IndexMut<usize, Output = T>>>, T>
-    IndexMut<StatePartIndex<K>> for BorrowedStatePart<'a, K>
-{
+impl<K: StatePartKind> IndexMut<StatePartIndex<K>> for BorrowedStatePart<'_, K> {
     fn index_mut(&mut self, index: StatePartIndex<K>) -> &mut Self::Output {
-        &mut self.value[index.value as usize]
+        K::borrowed_state_index_mut(&mut self.value, index)
     }
 }
 

crates/fayalite/src/sim/interpreter/parts.rs

@@ -236,6 +236,7 @@ pub(crate) trait StatePartKind:
     type LayoutData: Send + Sync + Eq + Hash + fmt::Debug + 'static + Copy;
     type State: fmt::Debug + 'static + Clone;
     type BorrowedState<'a>: 'a;
+    type StateElement;
     fn new_state(layout_data: &[Self::LayoutData]) -> Self::State;
     fn borrow_state<'a>(state: &'a mut Self::State) -> Self::BorrowedState<'a>;
     fn part_debug_data<BK: InsnsBuildingKind>(
@@ -247,6 +248,30 @@ pub(crate) trait StatePartKind:
         index: StatePartIndex<Self>,
         f: &mut impl fmt::Write,
     ) -> fmt::Result;
+    fn state_index<'a>(
+        state: &'a Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement;
+    fn state_index_mut<'a>(
+        state: &'a mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement;
+    fn state_index_fetch_and_clear_maybe_modified_flag(
+        state: &mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> bool;
+    fn borrowed_state_index<'a, 'b>(
+        state: &'a Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement;
+    fn borrowed_state_index_mut<'a, 'b>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement;
+    fn borrowed_state_get_disjoint_mut<'a, 'b, const N: usize>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_indexes: [StatePartIndex<Self>; N],
+    ) -> [&'a mut Self::StateElement; N];
 }
 
 macro_rules! make_state_part_kinds {
@@ -272,6 +297,7 @@ impl StatePartKind for StatePartKindMemories {
     type LayoutData = MemoryData<Interned<BitSlice>>;
     type State = Box<[MemoryData<BitBox>]>;
     type BorrowedState<'a> = &'a mut [MemoryData<BitBox>];
+    type StateElement = MemoryData<BitBox>;
     fn new_state(layout_data: &[Self::LayoutData]) -> Self::State {
         layout_data
             .iter()
@@ -297,19 +323,88 @@ impl StatePartKind for StatePartKindMemories {
     ) -> fmt::Result {
         write!(f, "{:#?}", &state.memories[index])
     }
+    fn state_index<'a>(
+        state: &'a Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state[part_index.as_usize()]
+    }
+    fn state_index_mut<'a>(
+        state: &'a mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        &mut state[part_index.as_usize()]
+    }
+    fn state_index_fetch_and_clear_maybe_modified_flag(
+        _state: &mut Self::State,
+        _part_index: StatePartIndex<Self>,
+    ) -> bool {
+        true
+    }
+    fn borrowed_state_index<'a, 'b>(
+        state: &'a Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state[part_index.as_usize()]
+    }
+    fn borrowed_state_index_mut<'a, 'b>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        &mut state[part_index.as_usize()]
+    }
+    fn borrowed_state_get_disjoint_mut<'a, 'b, const N: usize>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_indexes: [StatePartIndex<Self>; N],
+    ) -> [&'a mut Self::StateElement; N] {
+        state
+            .get_disjoint_mut(part_indexes.map(StatePartIndex::as_usize))
+            .expect("indexes are disjoint")
+    }
+}
+
+#[derive(Copy, Clone, PartialEq, Eq, Hash, Default)]
+pub(crate) struct StateAndModified<T, M> {
+    pub(crate) state: T,
+    pub(crate) modified: M,
+}
+
+impl<T: Deref<Target = [E]>, M: Deref<Target = [bool]>, E: fmt::Debug> fmt::Debug
+    for StateAndModified<T, M>
+{
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.debug_list()
+            .entries(self.state.iter().zip(self.modified.iter().copied()).map(
+                |(state, modified)| {
+                    fmt::from_fn(move |f| {
+                        state.fmt(f)?;
+                        if modified {
+                            f.write_str(" (modified)")?;
+                        }
+                        Ok(())
+                    })
+                },
+            ))
+            .finish()
+    }
 }
 
 impl StatePartKind for StatePartKindSmallSlots {
     const NAME: &'static str = "SmallSlots";
     type DebugData = SlotDebugData;
     type LayoutData = ();
-    type State = Box<[SmallUInt]>;
-    type BorrowedState<'a> = &'a mut [SmallUInt];
+    type State = StateAndModified<Box<[Self::StateElement]>, Box<[bool]>>;
+    type BorrowedState<'a> = StateAndModified<&'a mut [Self::StateElement], &'a mut [bool]>;
+    type StateElement = SmallUInt;
     fn new_state(layout_data: &[Self::LayoutData]) -> Self::State {
-        vec![0; layout_data.len()].into_boxed_slice()
+        StateAndModified {
+            state: vec![0; layout_data.len()].into_boxed_slice(),
+            modified: vec![false; layout_data.len()].into_boxed_slice(),
+        }
     }
     fn borrow_state<'a>(state: &'a mut Self::State) -> Self::BorrowedState<'a> {
-        state
+        let StateAndModified { state, modified } = state;
+        StateAndModified { state, modified }
     }
     fn part_debug_data<BK: InsnsBuildingKind>(
         state_layout: &StateLayout<BK>,
@@ -330,19 +425,69 @@ impl StatePartKind for StatePartKindSmallSlots {
         write!(f, "{value:#x} {}", value as SmallSInt)?;
         Ok(())
     }
+    fn state_index<'a>(
+        state: &'a Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn state_index_mut<'a>(
+        state: &'a mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn state_index_fetch_and_clear_maybe_modified_flag(
+        state: &mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> bool {
+        std::mem::replace(&mut state.modified[part_index.as_usize()], false)
+    }
+    fn borrowed_state_index<'a, 'b>(
+        state: &'a Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_index_mut<'a, 'b>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_get_disjoint_mut<'a, 'b, const N: usize>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_indexes: [StatePartIndex<Self>; N],
+    ) -> [&'a mut Self::StateElement; N] {
+        for part_index in part_indexes {
+            state.modified[part_index.as_usize()] = true;
+        }
+        state
+            .state
+            .get_disjoint_mut(part_indexes.map(StatePartIndex::as_usize))
+            .expect("indexes are disjoint")
+    }
 }
 
 impl StatePartKind for StatePartKindBigSlots {
     const NAME: &'static str = "BigSlots";
     type DebugData = SlotDebugData;
     type LayoutData = ();
-    type State = Box<[BigInt]>;
-    type BorrowedState<'a> = &'a mut [BigInt];
+    type State = StateAndModified<Box<[Self::StateElement]>, Box<[bool]>>;
+    type BorrowedState<'a> = StateAndModified<&'a mut [Self::StateElement], &'a mut [bool]>;
+    type StateElement = BigInt;
     fn new_state(layout_data: &[Self::LayoutData]) -> Self::State {
-        layout_data.iter().map(|_| BigInt::default()).collect()
+        let state: Box<[_]> = layout_data.iter().map(|_| BigInt::default()).collect();
+        StateAndModified {
+            modified: vec![false; state.len()].into_boxed_slice(),
+            state,
+        }
     }
     fn borrow_state<'a>(state: &'a mut Self::State) -> Self::BorrowedState<'a> {
-        state
+        let StateAndModified { state, modified } = state;
+        StateAndModified { state, modified }
     }
     fn part_debug_data<BK: InsnsBuildingKind>(
         state_layout: &StateLayout<BK>,
@@ -361,19 +506,69 @@ impl StatePartKind for StatePartKindBigSlots {
     ) -> fmt::Result {
         write!(f, "{:#x}", state.big_slots[index])
     }
+    fn state_index<'a>(
+        state: &'a Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn state_index_mut<'a>(
+        state: &'a mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn state_index_fetch_and_clear_maybe_modified_flag(
+        state: &mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> bool {
+        std::mem::replace(&mut state.modified[part_index.as_usize()], false)
+    }
+    fn borrowed_state_index<'a, 'b>(
+        state: &'a Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_index_mut<'a, 'b>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_get_disjoint_mut<'a, 'b, const N: usize>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_indexes: [StatePartIndex<Self>; N],
+    ) -> [&'a mut Self::StateElement; N] {
+        for part_index in part_indexes {
+            state.modified[part_index.as_usize()] = true;
+        }
+        state
+            .state
+            .get_disjoint_mut(part_indexes.map(StatePartIndex::as_usize))
+            .expect("indexes are disjoint")
+    }
 }
 
 impl StatePartKind for StatePartKindSimOnlySlots {
     const NAME: &'static str = "SimOnlySlots";
     type DebugData = SlotDebugData;
     type LayoutData = DynSimOnly;
-    type State = Box<[DynSimOnlyValue]>;
-    type BorrowedState<'a> = &'a mut [DynSimOnlyValue];
+    type State = StateAndModified<Box<[Self::StateElement]>, Box<[bool]>>;
+    type BorrowedState<'a> = StateAndModified<&'a mut [Self::StateElement], &'a mut [bool]>;
+    type StateElement = DynSimOnlyValue;
     fn new_state(layout_data: &[Self::LayoutData]) -> Self::State {
-        layout_data.iter().map(|ty| ty.default_value()).collect()
+        let state: Box<[_]> = layout_data.iter().map(|ty| ty.default_value()).collect();
+        StateAndModified {
+            modified: vec![false; state.len()].into_boxed_slice(),
+            state,
+        }
     }
     fn borrow_state<'a>(state: &'a mut Self::State) -> Self::BorrowedState<'a> {
-        state
+        let StateAndModified { state, modified } = state;
+        StateAndModified { state, modified }
     }
     fn part_debug_data<BK: InsnsBuildingKind>(
         state_layout: &StateLayout<BK>,
@@ -392,6 +587,50 @@ impl StatePartKind for StatePartKindSimOnlySlots {
     ) -> fmt::Result {
         write!(f, "{:?}", state.sim_only_slots[index])
     }
+    fn state_index<'a>(
+        state: &'a Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn state_index_mut<'a>(
+        state: &'a mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn state_index_fetch_and_clear_maybe_modified_flag(
+        state: &mut Self::State,
+        part_index: StatePartIndex<Self>,
+    ) -> bool {
+        std::mem::replace(&mut state.modified[part_index.as_usize()], false)
+    }
+    fn borrowed_state_index<'a, 'b>(
+        state: &'a Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a Self::StateElement {
+        &state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_index_mut<'a, 'b>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_index: StatePartIndex<Self>,
+    ) -> &'a mut Self::StateElement {
+        state.modified[part_index.as_usize()] = true;
+        &mut state.state[part_index.as_usize()]
+    }
+    fn borrowed_state_get_disjoint_mut<'a, 'b, const N: usize>(
+        state: &'a mut Self::BorrowedState<'b>,
+        part_indexes: [StatePartIndex<Self>; N],
+    ) -> [&'a mut Self::StateElement; N] {
+        for part_index in part_indexes {
+            state.modified[part_index.as_usize()] = true;
+        }
+        state
+            .state
+            .get_disjoint_mut(part_indexes.map(StatePartIndex::as_usize))
+            .expect("indexes are disjoint")
+    }
 }
 
 #[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Hash)]

crates/fayalite/src/sim/value.rs

@@ -15,7 +15,8 @@ use crate::{
     source_location::SourceLocation,
     ty::{
         CanonicalType, OpaqueSimValue, OpaqueSimValueSize, OpaqueSimValueSlice,
-        OpaqueSimValueWriter, StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        OpaqueSimValueWriter, SimValueDebug, StaticType, Type, TypeProperties,
+        impl_match_variant_as_self,
     },
     util::{
         ConstUsize, HashMap,
@@ -1394,6 +1395,15 @@ impl Type for DynSimOnly {
     }
 }
 
+impl SimValueDebug for DynSimOnly {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl<T: SimOnlyValueTrait> Type for SimOnly<T> {
     type BaseType = DynSimOnly;
     type MaskType = Bool;
@@ -1459,6 +1469,15 @@ impl<T: SimOnlyValueTrait> Type for SimOnly<T> {
     }
 }
 
+impl<T: SimOnlyValueTrait> SimValueDebug for SimOnly<T> {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 impl<T: SimOnlyValueTrait> StaticType for SimOnly<T> {
     const TYPE: Self = Self::new();
 

crates/fayalite/src/sim/vcd.rs

@@ -26,6 +26,7 @@ use std::{
     collections::BTreeMap,
     fmt::{self, Write as _},
     io, mem,
+    num::NonZeroU64,
 };
 
 #[derive(Default, Clone)]
@@ -186,6 +187,26 @@ impl<W: io::Write> fmt::Debug for VcdWriterDecls<W> {
     }
 }
 
+/// pass in scope to ensure it's not available in child scope
+fn try_write_vcd_scope<W: io::Write, R>(
+    writer: &mut W,
+    scope_type: &str,
+    scope_name: Interned<str>,
+    scope: Option<&mut Scope>,
+    f: impl FnOnce(&mut W, Option<&mut Scope>) -> io::Result<R>,
+) -> io::Result<R> {
+    let Some(scope) = scope else {
+        return f(writer, None);
+    };
+    write_vcd_scope(
+        writer,
+        scope_type,
+        scope_name,
+        scope,
+        move |writer, scope| f(writer, Some(scope)),
+    )
+}
+
 /// pass in scope to ensure it's not available in child scope
 fn write_vcd_scope<W: io::Write, R>(
     writer: &mut W,
@@ -237,6 +258,7 @@ trait_arg! {
 struct ArgModule<'a> {
     properties: &'a mut VcdWriterProperties,
     scope: &'a mut Scope,
+    instance_name: Option<Interned<str>>,
 }
 
 impl<'a> ArgModule<'a> {
@@ -244,6 +266,7 @@ impl<'a> ArgModule<'a> {
         ArgModule {
             properties: self.properties,
             scope: self.scope,
+            instance_name: self.instance_name,
         }
     }
 }
@@ -267,7 +290,7 @@ struct ArgInType<'a> {
     sink_var_type: &'static str,
     duplex_var_type: &'static str,
     properties: &'a mut VcdWriterProperties,
-    scope: &'a mut Scope,
+    scope: Option<&'a mut Scope>,
 }
 
 impl<'a> ArgInType<'a> {
@@ -277,7 +300,7 @@ impl<'a> ArgInType<'a> {
             sink_var_type: self.sink_var_type,
             duplex_var_type: self.duplex_var_type,
             properties: self.properties,
-            scope: self.scope,
+            scope: self.scope.as_deref_mut(),
         }
     }
 }
@@ -314,7 +337,7 @@ impl WriteTrace for TraceScalar {
 
 #[derive(Copy, Clone, PartialEq, Eq, Hash, Debug)]
 #[repr(transparent)]
-struct VcdId(u64);
+struct VcdId(NonZeroU64);
 
 impl VcdId {
     const CHAR_RANGE: std::ops::RangeInclusive<u8> = b'!'..=b'~';
@@ -344,11 +367,14 @@ impl VcdId {
             };
             retval = v;
         }
+        let Some(retval) = NonZeroU64::new(retval) else {
+            return None;
+        };
         Some(Self(retval))
     }
     #[must_use]
     const fn write(self, out: &mut [u8]) -> usize {
-        let mut id = self.0;
+        let mut id = self.0.get();
         let mut len = 0;
         loop {
             let digit = (id % Self::BASE as u64) as u8 + *Self::CHAR_RANGE.start();
@@ -363,7 +389,7 @@ impl VcdId {
         }
         len
     }
-    const MAX_ID_LEN: usize = Self(u64::MAX).write(&mut []);
+    const MAX_ID_LEN: usize = Self(NonZeroU64::MAX).write(&mut []);
 }
 
 /// check that VcdId properly round-trips
@@ -423,7 +449,7 @@ impl<T: fmt::Display> fmt::Display for Escaped<T> {
 
 fn write_vcd_var<W: io::Write>(
     properties: &mut VcdWriterProperties,
-    scope: &mut Scope,
+    scope: Option<&mut Scope>,
     memory_element_part_body: MemoryElementPartBody,
     writer: &mut W,
     var_type: &str,
@@ -431,8 +457,6 @@ fn write_vcd_var<W: io::Write>(
     location: TraceLocation,
     name: Interned<str>,
 ) -> io::Result<()> {
-    let path_hash = scope.path_hash.clone().joined(name);
-    let name = scope.new_identifier(name);
     let id = match location {
         TraceLocation::Scalar(id) => id.as_usize(),
         TraceLocation::Memory(TraceMemoryLocation {
@@ -464,12 +488,21 @@ fn write_vcd_var<W: io::Write>(
             first_id + *element_index
         }
     };
-    let id = properties
-        .scalar_id_to_vcd_id_map
-        .builder_get_or_insert(id, &path_hash);
-    write!(writer, "$var {var_type} {size} ")?;
-    write_vcd_id(writer, id)?;
-    writeln!(writer, " {name} $end")
+    if let Some(scope) = scope {
+        let path_hash = scope.path_hash.clone().joined(name);
+        let name = scope.new_identifier(name);
+        let id = properties
+            .scalar_id_to_vcd_id_map
+            .builder_get_or_insert(id, &path_hash);
+        write!(writer, "$var {var_type} {size} ")?;
+        write_vcd_id(writer, id)?;
+        writeln!(writer, " {name} $end")
+    } else {
+        properties
+            .scalar_id_to_vcd_id_map
+            .builder_unused_scalar_id(id);
+        Ok(())
+    }
 }
 
 impl WriteTrace for TraceUInt {
@@ -712,14 +745,24 @@ impl WriteTrace for TraceScope {
 
 impl WriteTrace for TraceModule {
     fn write_trace<W: io::Write, A: Arg>(self, writer: &mut W, mut arg: A) -> io::Result<()> {
-        let ArgModule { properties, scope } = arg.module();
+        let ArgModule {
+            properties,
+            scope,
+            instance_name,
+        } = arg.module();
         let Self { name, children } = self;
-        write_vcd_scope(writer, "module", name, scope, |writer, scope| {
-            for child in children {
-                child.write_trace(writer, ArgModuleBody { properties, scope })?;
-            }
-            Ok(())
-        })
+        write_vcd_scope(
+            writer,
+            "module",
+            instance_name.unwrap_or(name),
+            scope,
+            |writer, scope| {
+                for child in children {
+                    child.write_trace(writer, ArgModuleBody { properties, scope })?;
+                }
+                Ok(())
+            },
+        )
     }
 }
 
@@ -727,7 +770,7 @@ impl WriteTrace for TraceInstance {
     fn write_trace<W: io::Write, A: Arg>(self, writer: &mut W, mut arg: A) -> io::Result<()> {
         let ArgModuleBody { properties, scope } = arg.module_body();
         let Self {
-            name: _,
+            name,
             instance_io,
             module,
             ty: _,
@@ -739,10 +782,17 @@ impl WriteTrace for TraceInstance {
                 sink_var_type: "wire",
                 duplex_var_type: "wire",
                 properties,
-                scope,
+                scope: None,
             },
         )?;
-        module.write_trace(writer, ArgModule { properties, scope })
+        module.write_trace(
+            writer,
+            ArgModule {
+                properties,
+                scope,
+                instance_name: Some(name),
+            },
+        )
     }
 }
 
@@ -781,7 +831,7 @@ impl WriteTrace for TraceMem {
                                         sink_var_type: "reg",
                                         duplex_var_type: "reg",
                                         properties,
-                                        scope,
+                                        scope: Some(scope),
                                     },
                                 )
                             },
@@ -813,7 +863,7 @@ impl WriteTrace for TraceMemPort {
                 sink_var_type: "wire",
                 duplex_var_type: "wire",
                 properties,
-                scope,
+                scope: Some(scope),
             },
         )
     }
@@ -834,7 +884,7 @@ impl WriteTrace for TraceWire {
                 sink_var_type: "wire",
                 duplex_var_type: "wire",
                 properties,
-                scope,
+                scope: Some(scope),
             },
         )
     }
@@ -855,7 +905,7 @@ impl WriteTrace for TraceReg {
                 sink_var_type: "reg",
                 duplex_var_type: "reg",
                 properties,
-                scope,
+                scope: Some(scope),
             },
         )
     }
@@ -877,7 +927,7 @@ impl WriteTrace for TraceModuleIO {
                 sink_var_type: "wire",
                 duplex_var_type: "wire",
                 properties,
-                scope,
+                scope: Some(scope),
             },
         )
     }
@@ -898,7 +948,7 @@ impl WriteTrace for TraceBundle {
             ty: _,
             flow: _,
         } = self;
-        write_vcd_scope(writer, "struct", name, scope, |writer, scope| {
+        try_write_vcd_scope(writer, "struct", name, scope, |writer, mut scope| {
             for field in fields {
                 field.write_trace(
                     writer,
@@ -907,7 +957,7 @@ impl WriteTrace for TraceBundle {
                         sink_var_type,
                         duplex_var_type,
                         properties,
-                        scope,
+                        scope: scope.as_deref_mut(),
                     },
                 )?;
             }
@@ -931,7 +981,7 @@ impl WriteTrace for TraceArray {
             ty: _,
             flow: _,
         } = self;
-        write_vcd_scope(writer, "struct", name, scope, |writer, scope| {
+        try_write_vcd_scope(writer, "struct", name, scope, |writer, mut scope| {
             for element in elements {
                 element.write_trace(
                     writer,
@@ -940,7 +990,7 @@ impl WriteTrace for TraceArray {
                         sink_var_type,
                         duplex_var_type,
                         properties,
-                        scope,
+                        scope: scope.as_deref_mut(),
                     },
                 )?;
             }
@@ -965,7 +1015,7 @@ impl WriteTrace for TraceEnumWithFields {
             ty: _,
             flow: _,
         } = self;
-        write_vcd_scope(writer, "struct", name, scope, |writer, scope| {
+        try_write_vcd_scope(writer, "struct", name, scope, |writer, mut scope| {
             discriminant.write_trace(
                 writer,
                 ArgInType {
@@ -973,7 +1023,7 @@ impl WriteTrace for TraceEnumWithFields {
                     sink_var_type,
                     duplex_var_type,
                     properties,
-                    scope,
+                    scope: scope.as_deref_mut(),
                 },
             )?;
             for field in non_empty_fields {
@@ -984,7 +1034,7 @@ impl WriteTrace for TraceEnumWithFields {
                         sink_var_type,
                         duplex_var_type,
                         properties,
-                        scope,
+                        scope: scope.as_deref_mut(),
                     },
                 )?;
             }
@@ -1026,6 +1076,7 @@ impl<W: io::Write> TraceWriterDecls for VcdWriterDecls<W> {
             ArgModule {
                 properties: &mut properties,
                 scope: &mut Scope::new(PathHash::default()),
+                instance_name: None,
             },
         )?;
         let ScalarIdToVcdIdMapOrBuilder::Builder(scalar_id_to_vcd_id_map_builder) =
@@ -1065,23 +1116,29 @@ struct MemoryProperties {
 }
 
 struct ScalarIdToVcdIdMap {
-    scalar_id_to_vcd_id_map: Box<[VcdId]>,
+    scalar_id_to_vcd_id_map: Box<[Option<VcdId>]>,
 }
 
 #[derive(Default)]
 struct ScalarIdToVcdIdMapBuilder {
-    scalar_id_to_vcd_id_map: BTreeMap<usize, VcdId>,
+    scalar_id_to_vcd_id_map: BTreeMap<usize, Option<VcdId>>,
     lower_half_to_next_upper_half_map: HashMap<u64, u64>,
 }
 
 impl ScalarIdToVcdIdMapBuilder {
+    fn unused_scalar_id(&mut self, scalar_id: usize) {
+        self.scalar_id_to_vcd_id_map
+            .entry(scalar_id)
+            .or_insert(None);
+    }
     /// `VcdId`s are based off of `path_hash` (and not `scalar_id`) since the hash doesn't change
     /// when unrelated variables are added/removed, making the generated VCD more friendly for git diff.
     fn get_or_insert(&mut self, scalar_id: usize, path_hash: &PathHash) -> VcdId {
         *self
             .scalar_id_to_vcd_id_map
             .entry(scalar_id)
-            .or_insert_with(|| {
+            .or_insert(None)
+            .get_or_insert_with(|| {
                 let hash = u128::from_le_bytes(
                     *path_hash
                         .0
@@ -1094,7 +1151,7 @@ impl ScalarIdToVcdIdMapBuilder {
                 let next_upper_half = self
                     .lower_half_to_next_upper_half_map
                     .entry(lower_half)
-                    .or_insert(0);
+                    .or_insert(if lower_half == 0 { 1 } else { 0 });
                 let upper_half = *next_upper_half;
                 *next_upper_half += 1;
                 let Some(id) = upper_half
@@ -1103,7 +1160,7 @@ impl ScalarIdToVcdIdMapBuilder {
                 else {
                     panic!("too many VcdIds");
                 };
-                VcdId(id)
+                VcdId(NonZeroU64::new(id).expect("known to not be zero"))
             })
     }
     fn build(self) -> ScalarIdToVcdIdMap {
@@ -1129,7 +1186,7 @@ enum ScalarIdToVcdIdMapOrBuilder {
 }
 
 impl ScalarIdToVcdIdMapOrBuilder {
-    fn built_scalar_id_to_vcd_id(&self, scalar_id: usize) -> VcdId {
+    fn built_scalar_id_to_vcd_id(&self, scalar_id: usize) -> Option<VcdId> {
         let Self::Built(v) = self else {
             panic!("ScalarIdToVcdIdMap isn't built yet");
         };
@@ -1141,6 +1198,12 @@ impl ScalarIdToVcdIdMapOrBuilder {
         };
         v.get_or_insert(scalar_id, path_hash)
     }
+    fn builder_unused_scalar_id(&mut self, scalar_id: usize) {
+        let Self::Builder(v) = self else {
+            panic!("ScalarIdToVcdIdMap is already built");
+        };
+        v.unused_scalar_id(scalar_id)
+    }
 }
 
 struct VcdWriterProperties {
@@ -1165,8 +1228,11 @@ impl<W: io::Write + 'static> VcdWriter<W> {
 fn write_string_value_change(
     writer: &mut impl io::Write,
     value: impl fmt::Display,
-    id: VcdId,
+    id: Option<VcdId>,
 ) -> io::Result<()> {
+    let Some(id) = id else {
+        return Ok(());
+    };
     write!(writer, "s{} ", Escaped(value))?;
     write_vcd_id(writer, id)?;
     writer.write_all(b"\n")
@@ -1175,8 +1241,11 @@ fn write_string_value_change(
 fn write_bits_value_change(
     writer: &mut impl io::Write,
     value: &BitSlice,
-    id: VcdId,
+    id: Option<VcdId>,
 ) -> io::Result<()> {
+    let Some(id) = id else {
+        return Ok(());
+    };
     match value.len() {
         0 => writer.write_all(b"s0 ")?,
         1 => writer.write_all(if value[0] { b"1" } else { b"0" })?,
@@ -1205,7 +1274,7 @@ fn write_enum_discriminant_value_change(
     writer: &mut impl io::Write,
     variant_index: usize,
     ty: Enum,
-    id: VcdId,
+    id: Option<VcdId>,
 ) -> io::Result<()> {
     write_string_value_change(
         writer,

crates/fayalite/src/ty.rs

@@ -367,7 +367,15 @@ impl<D: Type> TypeOrDefault<D> for crate::__ {
 }
 
 pub trait Type:
-    Copy + Hash + Eq + fmt::Debug + Send + Sync + 'static + FillInDefaultedGenerics<Type = Self>
+    Copy
+    + Hash
+    + Eq
+    + fmt::Debug
+    + Send
+    + Sync
+    + 'static
+    + FillInDefaultedGenerics<Type = Self>
+    + SimValueDebug
 {
     type BaseType: BaseType;
     type MaskType: Type<MaskType = Self::MaskType>;
@@ -402,6 +410,16 @@ pub trait Type:
     ) -> OpaqueSimValueWritten<'w>;
 }
 
+pub trait SimValueDebug {
+    fn sim_value_debug(value: &<Self as Type>::SimValue, f: &mut fmt::Formatter<'_>) -> fmt::Result
+    where
+        Self: Type;
+}
+
+pub trait SimValueDisplay: Type {
+    fn sim_value_display(value: &Self::SimValue, f: &mut fmt::Formatter<'_>) -> fmt::Result;
+}
+
 pub trait BaseType:
     Type<
         BaseType = Self,
@@ -490,6 +508,15 @@ impl Type for CanonicalType {
     }
 }
 
+impl SimValueDebug for CanonicalType {
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        fmt::Debug::fmt(value, f)
+    }
+}
+
 #[derive(Clone, PartialEq, Eq, Hash, Debug, Serialize, Deserialize, Default)]
 #[non_exhaustive]
 pub struct OpaqueSimValueSizeRange {

crates/fayalite/tests/hdl_types_fmt.rs

@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: LGPL-3.0-or-later
+// See Notices.txt for copyright information
+use fayalite::{prelude::*, ty::SimValueDebug};
+use std::fmt;
+
+#[hdl(outline_generated)]
+struct MyStruct0<T, S: Size> {
+    v: T,
+    a: ArrayType<UInt<8>, S>,
+}
+
+#[hdl]
+#[test]
+fn check_my_struct0() {
+    let ty = MyStruct0[UInt[8]][3];
+    assert_eq!(
+        format!("{ty:?}"),
+        "MyStruct0 { v: UInt<8>, a: Array<UInt<8>, 3> }",
+    );
+    assert_eq!(
+        format!("{:?}", ty.mask_type()),
+        "MaskType<MyStruct0> { v: Bool, a: Array<Bool, 3> }",
+    );
+    let v = #[hdl(sim)]
+    MyStruct0::<_, _> {
+        v: 0x23u8,
+        a: [1u8, 2, 3],
+    };
+    assert_eq!(
+        format!("{v:?}"),
+        "MyStruct0 { v: 0x23_u8, a: [0x1_u8, 0x2_u8, 0x3_u8] }",
+    );
+}
+
+#[hdl(outline_generated, custom_debug())]
+struct MyStruct1<T, S: Size> {
+    v: T,
+    a: ArrayType<UInt<8>, S>,
+}
+
+impl<T: Type, S: Size> fmt::Debug for MyStruct1<T, S> {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let Self { v, a } = self;
+        f.debug_struct("Custom<MyStruct1>")
+            .field("v", v)
+            .field("a", a)
+            .finish()
+    }
+}
+
+impl<T: Type, S: Size> SimValueDebug for MyStruct1<T, S> {
+    #[hdl]
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        #[hdl(sim)]
+        let Self { v, a } = value;
+        f.debug_struct("Custom<MyStruct1>")
+            .field("v", &v)
+            .field("a", &a)
+            .finish()
+    }
+}
+
+#[hdl]
+#[test]
+fn check_my_struct1() {
+    let ty = MyStruct1[UInt[8]][3];
+    assert_eq!(
+        format!("{ty:?}"),
+        "Custom<MyStruct1> { v: UInt<8>, a: Array<UInt<8>, 3> }",
+    );
+    assert_eq!(
+        format!("{:?}", ty.mask_type()),
+        "MaskType<MyStruct1> { v: Bool, a: Array<Bool, 3> }",
+    );
+    let v = #[hdl(sim)]
+    MyStruct1::<_, _> {
+        v: 0x23u8,
+        a: [1u8, 2, 3],
+    };
+    assert_eq!(
+        format!("{v:?}"),
+        "Custom<MyStruct1> { v: 0x23_u8, a: [0x1_u8, 0x2_u8, 0x3_u8] }",
+    );
+}
+
+#[hdl(outline_generated)]
+enum MyEnum0<T, S: Size> {
+    Unit,
+    V(T),
+    A(ArrayType<UInt<8>, S>),
+}
+
+#[hdl]
+#[test]
+fn check_my_enum0() {
+    let ty = MyEnum0[UInt[8]][3];
+    assert_eq!(
+        format!("{ty:?}"),
+        "MyEnum0 { Unit: (), V: UInt<8>, A: Array<UInt<8>, 3> }",
+    );
+    let v = #[hdl(sim)]
+    ty.Unit();
+    assert_eq!(format!("{v:?}"), "Unit");
+    let v = #[hdl(sim)]
+    ty.V(0x23u8);
+    assert_eq!(format!("{v:?}"), "V(0x23_u8)");
+    let v = #[hdl(sim)]
+    ty.A([1u8, 2, 3]);
+    assert_eq!(format!("{v:?}"), "A([0x1_u8, 0x2_u8, 0x3_u8])");
+}
+
+#[hdl(outline_generated, custom_debug())]
+enum MyEnum1<T, S: Size> {
+    Unit,
+    V(T),
+    A(ArrayType<UInt<8>, S>),
+}
+
+impl<T: Type, S: Size> fmt::Debug for MyEnum1<T, S> {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        let Self { Unit, V, A } = self;
+        f.debug_struct("Custom<MyEnum1>")
+            .field("Unit", Unit)
+            .field("V", V)
+            .field("A", A)
+            .finish()
+    }
+}
+
+impl<T: Type, S: Size> SimValueDebug for MyEnum1<T, S> {
+    #[hdl]
+    fn sim_value_debug(
+        value: &<Self as Type>::SimValue,
+        f: &mut fmt::Formatter<'_>,
+    ) -> fmt::Result {
+        type SimValueT<T> = <T as Type>::SimValue;
+        match value {
+            SimValueT::<Self>::Unit(_) => f.write_str("MyEnum1::Unit"),
+            SimValueT::<Self>::V(v, _) => f.debug_tuple("MyEnum1::V").field(v).finish(),
+            SimValueT::<Self>::A(a, _) => f.debug_tuple("MyEnum1::A").field(a).finish(),
+            SimValueT::<Self>::Unknown(_) => f.write_str("MyEnum1::Unknown"),
+        }
+    }
+}
+
+#[hdl]
+#[test]
+fn check_my_enum1() {
+    let ty = MyEnum1[UInt[8]][3];
+    assert_eq!(
+        format!("{ty:?}"),
+        "Custom<MyEnum1> { Unit: (), V: UInt<8>, A: Array<UInt<8>, 3> }",
+    );
+    let v = #[hdl(sim)]
+    ty.Unit();
+    assert_eq!(format!("{v:?}"), "MyEnum1::Unit");
+    let v = #[hdl(sim)]
+    ty.V(0x23u8);
+    assert_eq!(format!("{v:?}"), "MyEnum1::V(0x23_u8)");
+    let v = #[hdl(sim)]
+    ty.A([1u8, 2, 3]);
+    assert_eq!(format!("{v:?}"), "MyEnum1::A([0x1_u8, 0x2_u8, 0x3_u8])");
+}

crates/fayalite/tests/sim.rs

@@ -7,7 +7,7 @@ use fayalite::{
     prelude::*,
     reset::ResetType,
     sim::vcd::VcdWriterDecls,
-    util::RcWriter,
+    util::{RcWriter, ready_valid::queue},
 };
 use std::{collections::BTreeMap, num::NonZeroUsize, rc::Rc};
 
@@ -2495,3 +2495,349 @@ fn test_sim_read_past() {
         panic!();
     }
 }
+
+#[hdl_module(outline_generated)]
+pub fn last_connect() {
+    #[hdl]
+    let inp: HdlOption<Array<Bool, 4>> = m.input();
+    #[hdl]
+    let out: HdlOption<UInt<8>> = m.output();
+    connect(out, HdlNone());
+    #[hdl]
+    if let HdlSome(v) = inp {
+        #[hdl]
+        let w = wire();
+        connect(out, HdlSome(w));
+        connect(w, v.len() as u8);
+        for (i, v) in v.into_iter().enumerate() {
+            #[hdl]
+            if v {
+                connect(w, i as u8);
+            }
+        }
+    }
+}
+
+#[hdl]
+#[test]
+fn test_last_connect() {
+    let _n = SourceLocation::normalize_files_for_tests();
+    let mut sim = Simulation::new(last_connect());
+    let mut writer = RcWriter::default();
+    sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
+    let bools = [false, true];
+    sim.write(sim.io().inp, HdlNone());
+    sim.advance_time(SimDuration::from_micros(1));
+    let expected: SimValue<HdlOption<UInt<8>>> = #[hdl(sim)]
+    HdlNone();
+    assert_eq!(sim.read(sim.io().out), expected);
+    for a in bools {
+        for b in bools {
+            for c in bools {
+                for d in bools {
+                    let inp = [a, b, c, d];
+                    sim.write(sim.io().inp, HdlSome(inp));
+                    sim.advance_time(SimDuration::from_micros(1));
+                    let mut expected = inp.len() as u8;
+                    for (i, v) in inp.into_iter().enumerate() {
+                        if v {
+                            expected = i as u8;
+                        }
+                    }
+                    let expected: SimValue<HdlOption<UInt<8>>> = #[hdl(sim)]
+                    HdlSome(expected);
+                    let out = sim.read(sim.io().out);
+                    println!("expected={expected:?} out={out:?} inp={inp:?}");
+                    assert_eq!(expected, out);
+                }
+            }
+        }
+    }
+    sim.flush_traces().unwrap();
+    let vcd = String::from_utf8(writer.take()).unwrap();
+    println!("####### VCD:\n{vcd}\n#######");
+    if vcd != include_str!("sim/expected/last_connect.vcd") {
+        panic!();
+    }
+    let sim_debug = format!("{sim:#?}");
+    println!("#######\n{sim_debug}\n#######");
+    if sim_debug != include_str!("sim/expected/last_connect.txt") {
+        panic!();
+    }
+}
+
+#[track_caller]
+#[hdl]
+fn test_queue_helper(
+    capacity: usize,
+    inp_ready_is_comb: bool,
+    out_valid_is_comb: bool,
+    expected_vcd: &str,
+    expected_sim_debug: &str,
+) {
+    let _n = SourceLocation::normalize_files_for_tests();
+    let mut sim = Simulation::new(queue(
+        UInt::<8>::new_static(),
+        NonZeroUsize::new(capacity).expect("capacity should be non-zero"),
+        inp_ready_is_comb,
+        out_valid_is_comb,
+    ));
+    let writer = RcWriter::default();
+    sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
+    struct DumpVcdOnDrop {
+        writer: Option<RcWriter>,
+    }
+    impl Drop for DumpVcdOnDrop {
+        fn drop(&mut self) {
+            if let Some(mut writer) = self.writer.take() {
+                let vcd = String::from_utf8(writer.take()).unwrap();
+                println!("####### VCD:\n{vcd}\n#######");
+            }
+        }
+    }
+    let mut writer = DumpVcdOnDrop {
+        writer: Some(writer),
+    };
+    sim.write_clock(sim.io().cd.clk, false);
+    sim.write_reset(sim.io().cd.rst, true);
+    let mut input_value = 0u8;
+    let mut expected_output_value = 0u8;
+    /// deterministic random numbers
+    fn rand(mut v: u32) -> bool {
+        // random 32-bit primes
+        v = v.wrapping_mul(0xF807B7EF).rotate_left(16);
+        v ^= 0xA1E24BBA; // random 32-bit constant
+        v = v.wrapping_mul(0xE9D30017).rotate_left(16);
+        v = v.wrapping_mul(0x3895AFFB).rotate_left(16);
+        v & 1 != 0
+    }
+    for cycle in 0..100u32 {
+        println!("cycle: {cycle}");
+        sim.write(
+            sim.io().inp.data,
+            if rand(cycle) {
+                #[hdl(sim)]
+                HdlSome(input_value)
+            } else {
+                #[hdl(sim)]
+                HdlNone()
+            },
+        );
+        sim.write_bool(sim.io().out.ready, rand(u32::MAX / 2 + cycle));
+        sim.advance_time(SimDuration::from_nanos(500));
+        if !sim.read_reset(sim.io().cd.rst) {
+            let inp_ready = sim.read_bool(sim.io().inp.ready);
+            if inp_ready {
+                #[hdl(sim)]
+                if let HdlSome(v) = sim.read(sim.io().inp.data) {
+                    println!("enqueued {v}, expected {input_value:#x}");
+                    assert_eq!(v.as_int(), input_value);
+                    input_value = input_value.wrapping_add(1);
+                }
+            }
+            let out_valid = #[hdl(sim)]
+            if let HdlSome(v) = sim.read(sim.io().out.data) {
+                if sim.read_bool(sim.io().out.ready) {
+                    println!("dequeued {v}, expected {expected_output_value:#x}");
+                    assert_eq!(v.as_int(), expected_output_value);
+                    expected_output_value = expected_output_value.wrapping_add(1);
+                }
+                true
+            } else {
+                false
+            };
+            assert!(inp_ready || out_valid, "queue isn't making progress");
+        }
+        sim.write_clock(sim.io().cd.clk, true);
+        sim.advance_time(SimDuration::from_nanos(500));
+        sim.write_clock(sim.io().cd.clk, false);
+        sim.write_reset(sim.io().cd.rst, false);
+    }
+    sim.flush_traces().unwrap();
+    let vcd = String::from_utf8(writer.writer.take().unwrap().take()).unwrap();
+    println!("####### VCD:\n{vcd}\n#######");
+    if vcd != expected_vcd {
+        panic!();
+    }
+    let sim_debug = format!("{sim:#?}");
+    println!("#######\n{sim_debug}\n#######");
+    if sim_debug != expected_sim_debug {
+        panic!();
+    }
+}
+
+#[test]
+fn test_queue_1_false_false() {
+    test_queue_helper(
+        1,
+        false,
+        false,
+        include_str!("sim/expected/queue_1_false_false.vcd"),
+        include_str!("sim/expected/queue_1_false_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_1_false_true() {
+    test_queue_helper(
+        1,
+        false,
+        true,
+        include_str!("sim/expected/queue_1_false_true.vcd"),
+        include_str!("sim/expected/queue_1_false_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_1_true_false() {
+    test_queue_helper(
+        1,
+        true,
+        false,
+        include_str!("sim/expected/queue_1_true_false.vcd"),
+        include_str!("sim/expected/queue_1_true_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_1_true_true() {
+    test_queue_helper(
+        1,
+        true,
+        true,
+        include_str!("sim/expected/queue_1_true_true.vcd"),
+        include_str!("sim/expected/queue_1_true_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_2_false_false() {
+    test_queue_helper(
+        2,
+        false,
+        false,
+        include_str!("sim/expected/queue_2_false_false.vcd"),
+        include_str!("sim/expected/queue_2_false_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_2_false_true() {
+    test_queue_helper(
+        2,
+        false,
+        true,
+        include_str!("sim/expected/queue_2_false_true.vcd"),
+        include_str!("sim/expected/queue_2_false_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_2_true_false() {
+    test_queue_helper(
+        2,
+        true,
+        false,
+        include_str!("sim/expected/queue_2_true_false.vcd"),
+        include_str!("sim/expected/queue_2_true_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_2_true_true() {
+    test_queue_helper(
+        2,
+        true,
+        true,
+        include_str!("sim/expected/queue_2_true_true.vcd"),
+        include_str!("sim/expected/queue_2_true_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_3_false_false() {
+    test_queue_helper(
+        3,
+        false,
+        false,
+        include_str!("sim/expected/queue_3_false_false.vcd"),
+        include_str!("sim/expected/queue_3_false_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_3_false_true() {
+    test_queue_helper(
+        3,
+        false,
+        true,
+        include_str!("sim/expected/queue_3_false_true.vcd"),
+        include_str!("sim/expected/queue_3_false_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_3_true_false() {
+    test_queue_helper(
+        3,
+        true,
+        false,
+        include_str!("sim/expected/queue_3_true_false.vcd"),
+        include_str!("sim/expected/queue_3_true_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_3_true_true() {
+    test_queue_helper(
+        3,
+        true,
+        true,
+        include_str!("sim/expected/queue_3_true_true.vcd"),
+        include_str!("sim/expected/queue_3_true_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_4_false_false() {
+    test_queue_helper(
+        4,
+        false,
+        false,
+        include_str!("sim/expected/queue_4_false_false.vcd"),
+        include_str!("sim/expected/queue_4_false_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_4_false_true() {
+    test_queue_helper(
+        4,
+        false,
+        true,
+        include_str!("sim/expected/queue_4_false_true.vcd"),
+        include_str!("sim/expected/queue_4_false_true.txt"),
+    );
+}
+
+#[test]
+fn test_queue_4_true_false() {
+    test_queue_helper(
+        4,
+        true,
+        false,
+        include_str!("sim/expected/queue_4_true_false.vcd"),
+        include_str!("sim/expected/queue_4_true_false.txt"),
+    );
+}
+
+#[test]
+fn test_queue_4_true_true() {
+    test_queue_helper(
+        4,
+        true,
+        true,
+        include_str!("sim/expected/queue_4_true_true.vcd"),
+        include_str!("sim/expected/queue_4_true_true.txt"),
+    );
+}

crates/fayalite/tests/sim/expected/array_rw.txt

@@ -424,8 +424,8 @@ Simulation {
         },
         small_slots: StatePart {
             value: [
-                16,
-                0,
+                16 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -483,7 +483,7 @@ Simulation {
                 248,
                 252,
                 254,
-                255,
+                255 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -1218,6 +1218,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xff,
             last_state: 0xff,
         },
@@ -1227,6 +1228,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(1),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x7f,
             last_state: 0x7f,
         },
@@ -1236,6 +1238,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x3f,
             last_state: 0x3f,
         },
@@ -1245,6 +1248,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x1f,
             last_state: 0x1f,
         },
@@ -1254,6 +1258,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x0f,
             last_state: 0x0f,
         },
@@ -1263,6 +1268,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x07,
             last_state: 0x07,
         },
@@ -1272,6 +1278,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(6),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x03,
             last_state: 0x03,
         },
@@ -1281,6 +1288,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(7),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x01,
             last_state: 0x01,
         },
@@ -1290,6 +1298,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(8),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -1299,6 +1308,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(9),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x80,
             last_state: 0x80,
         },
@@ -1308,6 +1318,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(10),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xc0,
             last_state: 0xc0,
         },
@@ -1317,6 +1328,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(11),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xe0,
             last_state: 0xe0,
         },
@@ -1326,6 +1338,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(12),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf0,
             last_state: 0xf0,
         },
@@ -1335,6 +1348,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(13),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf8,
             last_state: 0xf8,
         },
@@ -1344,6 +1358,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(14),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfc,
             last_state: 0xfc,
         },
@@ -1353,6 +1368,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(15),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfe,
             last_state: 0xfe,
         },
@@ -1362,6 +1378,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(16),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xff,
             last_state: 0xff,
         },
@@ -1371,6 +1388,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(17),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x7f,
             last_state: 0x7f,
         },
@@ -1380,6 +1398,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(18),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x3f,
             last_state: 0x3f,
         },
@@ -1389,6 +1408,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(19),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x1f,
             last_state: 0x1f,
         },
@@ -1398,6 +1418,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(20),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x0f,
             last_state: 0x0f,
         },
@@ -1407,6 +1428,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(21),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x07,
             last_state: 0x07,
         },
@@ -1416,6 +1438,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(22),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x03,
             last_state: 0x03,
         },
@@ -1425,6 +1448,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(23),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x01,
             last_state: 0x01,
         },
@@ -1434,6 +1458,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(24),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -1443,6 +1468,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(25),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x80,
             last_state: 0x80,
         },
@@ -1452,6 +1478,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(26),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xc0,
             last_state: 0xc0,
         },
@@ -1461,6 +1488,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(27),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xe0,
             last_state: 0xe0,
         },
@@ -1470,6 +1498,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(28),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf0,
             last_state: 0xf0,
         },
@@ -1479,6 +1508,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(29),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf8,
             last_state: 0xf8,
         },
@@ -1488,6 +1518,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(30),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfc,
             last_state: 0xfc,
         },
@@ -1497,6 +1528,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(31),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfe,
             last_state: 0xe1,
         },
@@ -1506,6 +1538,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(32),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -1515,6 +1548,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(33),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xff,
             last_state: 0xff,
         },
@@ -1524,6 +1558,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(34),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x10,
             last_state: 0x0f,
         },
@@ -1533,6 +1568,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(35),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0xe1,
         },
@@ -1541,6 +1577,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(36),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1550,6 +1587,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(37),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xff,
             last_state: 0xff,
         },
@@ -1559,6 +1597,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(38),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x7f,
             last_state: 0x7f,
         },
@@ -1568,6 +1607,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(39),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x3f,
             last_state: 0x3f,
         },
@@ -1577,6 +1617,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(40),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x1f,
             last_state: 0x1f,
         },
@@ -1586,6 +1627,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(41),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x0f,
             last_state: 0x0f,
         },
@@ -1595,6 +1637,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(42),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x07,
             last_state: 0x07,
         },
@@ -1604,6 +1647,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(43),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x03,
             last_state: 0x03,
         },
@@ -1613,6 +1657,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(44),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x01,
             last_state: 0x01,
         },
@@ -1622,6 +1667,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(45),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -1631,6 +1677,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(46),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x80,
             last_state: 0x80,
         },
@@ -1640,6 +1687,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(47),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xc0,
             last_state: 0xc0,
         },
@@ -1649,6 +1697,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(48),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xe0,
             last_state: 0xe0,
         },
@@ -1658,6 +1707,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(49),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf0,
             last_state: 0xf0,
         },
@@ -1667,6 +1717,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(50),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xf8,
             last_state: 0xf8,
         },
@@ -1676,6 +1727,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(51),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfc,
             last_state: 0xfc,
         },
@@ -1685,6 +1737,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(52),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xfe,
             last_state: 0xe1,
         },

crates/fayalite/tests/sim/expected/conditional_assignment_last.txt

@@ -86,8 +86,8 @@ Simulation {
             value: [
                 1,
                 0,
-                1,
-                0,
+                1 (modified),
+                0 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -155,6 +155,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },
@@ -163,6 +164,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },

crates/fayalite/tests/sim/expected/connect_const.txt

@@ -63,7 +63,7 @@ Simulation {
         big_slots: StatePart {
             value: [
                 5,
-                5,
+                5 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -124,6 +124,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x05,
             last_state: 0x05,
         },

crates/fayalite/tests/sim/expected/connect_const_reset.txt

@@ -90,9 +90,9 @@ Simulation {
             value: [
                 1,
                 1,
-                1,
-                1,
-                1,
+                1 (modified),
+                1 (modified),
+                1 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -175,6 +175,7 @@ Simulation {
             kind: BigAsyncReset {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -183,6 +184,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },

crates/fayalite/tests/sim/expected/counter_async.txt

@@ -123,68 +123,72 @@ Simulation {
                     dest: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<4> },
                 },
+                8: Copy {
+                    dest: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
+                    src: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
-                8: Add {
+                9: Add {
                     dest: StatePartIndex<BigSlots>(8), // (0x4) SlotDebugData { name: "", ty: UInt<5> },
                     lhs: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     rhs: StatePartIndex<BigSlots>(7), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                9: CastToUInt {
+                10: CastToUInt {
                     dest: StatePartIndex<BigSlots>(9), // (0x4) SlotDebugData { name: "", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(8), // (0x4) SlotDebugData { name: "", ty: UInt<5> },
                     dest_width: 4,
                 },
                 // at: module-XXXXXXXXXX.rs:4:1
-                10: Copy {
+                11: Copy {
                     dest: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(9), // (0x4) SlotDebugData { name: "", ty: UInt<4> },
                 },
                 // at: module-XXXXXXXXXX.rs:6:1
-                11: Copy {
+                12: Copy {
                     dest: StatePartIndex<BigSlots>(2), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                 },
                 // at: module-XXXXXXXXXX.rs:3:1
-                12: BranchIfSmallNonZero {
-                    target: 16,
+                13: BranchIfSmallNonZero {
+                    target: 17,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                13: BranchIfSmallZero {
-                    target: 17,
+                14: BranchIfSmallZero {
+                    target: 18,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                14: Copy {
+                15: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
                 },
-                15: Branch {
-                    target: 17,
+                16: Branch {
+                    target: 18,
                 },
-                16: Copy {
+                17: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<4> },
                 },
-                17: XorSmallImmediate {
+                18: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                18: Return,
+                19: Return,
             ],
             ..
         },
-        pc: 18,
+        pc: 19,
         memory_write_log: [],
         memories: StatePart {
             value: [],
         },
         small_slots: StatePart {
             value: [
-                0,
-                0,
-                1,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -193,12 +197,12 @@ Simulation {
                 0,
                 3,
                 3,
-                4,
-                3,
-                0,
-                1,
-                4,
-                4,
+                4 (modified),
+                3 (modified),
+                0 (modified),
+                1 (modified),
+                4 (modified),
+                4 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -328,6 +332,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },
@@ -336,6 +341,7 @@ Simulation {
             kind: BigAsyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -345,6 +351,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x3,
             last_state: 0x2,
         },
@@ -354,6 +361,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x3,
             last_state: 0x2,
         },

crates/fayalite/tests/sim/expected/counter_sync.txt

@@ -102,71 +102,75 @@ Simulation {
                     src: StatePartIndex<BigSlots>(7), // (0x4) SlotDebugData { name: "", ty: UInt<5> },
                     dest_width: 4,
                 },
-                // at: module-XXXXXXXXXX.rs:4:1
-                4: Copy {
-                    dest: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
-                    src: StatePartIndex<BigSlots>(8), // (0x4) SlotDebugData { name: "", ty: UInt<4> },
-                },
                 // at: module-XXXXXXXXXX.rs:3:1
-                5: IsNonZeroDestIsSmall {
+                4: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::cd.rst", ty: SyncReset },
                 },
-                6: IsNonZeroDestIsSmall {
+                5: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(0), // (0x1) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::cd.clk", ty: Clock },
                 },
-                7: AndSmall {
+                6: AndSmall {
                     dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
+                7: Copy {
+                    dest: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
+                    src: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
+                },
+                // at: module-XXXXXXXXXX.rs:4:1
+                8: Copy {
+                    dest: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
+                    src: StatePartIndex<BigSlots>(8), // (0x4) SlotDebugData { name: "", ty: UInt<4> },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
-                8: Const {
+                9: Const {
                     dest: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<4> },
                     value: 0x3,
                 },
                 // at: module-XXXXXXXXXX.rs:3:1
-                9: BranchIfSmallZero {
-                    target: 14,
+                10: BranchIfSmallZero {
+                    target: 15,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                10: BranchIfSmallNonZero {
-                    target: 13,
+                11: BranchIfSmallNonZero {
+                    target: 14,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                11: Copy {
+                12: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(4), // (0x4) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg$next", ty: UInt<4> },
                 },
-                12: Branch {
-                    target: 14,
+                13: Branch {
+                    target: 15,
                 },
-                13: Copy {
+                14: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x3) SlotDebugData { name: "InstantiatedModule(counter: counter).counter::count_reg", ty: UInt<4> },
                     src: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<4> },
                 },
-                14: XorSmallImmediate {
+                15: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                15: Return,
+                16: Return,
             ],
             ..
         },
-        pc: 15,
+        pc: 16,
         memory_write_log: [],
         memories: StatePart {
             value: [],
         },
         small_slots: StatePart {
             value: [
-                0,
-                0,
-                1,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -175,11 +179,11 @@ Simulation {
                 0,
                 3,
                 3,
-                4,
-                3,
-                1,
-                4,
-                4,
+                4 (modified),
+                3 (modified),
+                1 (modified),
+                4 (modified),
+                4 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -309,6 +313,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },
@@ -317,6 +322,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -326,6 +332,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x3,
             last_state: 0x2,
         },
@@ -335,6 +342,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x3,
             last_state: 0x2,
         },

crates/fayalite/tests/sim/expected/duplicate_names.txt

@@ -81,9 +81,9 @@ Simulation {
         big_slots: StatePart {
             value: [
                 5,
-                5,
-                6,
+                5 (modified),
                 6,
+                6 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -137,6 +137,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x05,
             last_state: 0x05,
         },
@@ -146,6 +147,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x06,
             last_state: 0x06,
         },

crates/fayalite/tests/sim/expected/enums.txt

@@ -1012,173 +1012,177 @@ Simulation {
                     lhs: StatePartIndex<SmallSlots>(4), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
+                99: Copy {
+                    dest: StatePartIndex<BigSlots>(24), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg$next", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
+                    src: StatePartIndex<BigSlots>(23), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
-                99: Const {
+                100: Const {
                     dest: StatePartIndex<BigSlots>(25), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                     value: 0x0,
                 },
-                100: Copy {
+                101: Copy {
                     dest: StatePartIndex<BigSlots>(26), // (0x0) SlotDebugData { name: "", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(25), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                 },
                 // at: module-XXXXXXXXXX.rs:12:1
-                101: BranchIfZero {
-                    target: 109,
+                102: BranchIfZero {
+                    target: 110,
                     value: StatePartIndex<BigSlots>(2), // (0x1) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::en", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:13:1
-                102: BranchIfZero {
-                    target: 104,
+                103: BranchIfZero {
+                    target: 105,
                     value: StatePartIndex<BigSlots>(46), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:14:1
-                103: Copy {
+                104: Copy {
                     dest: StatePartIndex<BigSlots>(24), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg$next", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(26), // (0x0) SlotDebugData { name: "", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                 },
                 // at: module-XXXXXXXXXX.rs:13:1
-                104: BranchIfNonZero {
-                    target: 109,
+                105: BranchIfNonZero {
+                    target: 110,
                     value: StatePartIndex<BigSlots>(46), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:15:1
-                105: BranchIfZero {
-                    target: 107,
+                106: BranchIfZero {
+                    target: 108,
                     value: StatePartIndex<BigSlots>(48), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:16:1
-                106: Copy {
+                107: Copy {
                     dest: StatePartIndex<BigSlots>(24), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg$next", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(65), // (0xd) SlotDebugData { name: "", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                 },
                 // at: module-XXXXXXXXXX.rs:15:1
-                107: BranchIfNonZero {
-                    target: 109,
+                108: BranchIfNonZero {
+                    target: 110,
                     value: StatePartIndex<BigSlots>(48), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:17:1
-                108: Copy {
+                109: Copy {
                     dest: StatePartIndex<BigSlots>(24), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg$next", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(87), // (0x3e) SlotDebugData { name: "", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                 },
                 // at: module-XXXXXXXXXX.rs:10:1
-                109: Copy {
+                110: Copy {
                     dest: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b2_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                     src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                110: Copy {
+                111: Copy {
                     dest: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     src: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b2_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                 },
-                111: SliceInt {
+                112: SliceInt {
                     dest: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     src: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     start: 1,
                     len: 2,
                 },
-                112: SliceInt {
+                113: SliceInt {
                     dest: StatePartIndex<BigSlots>(20), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     start: 0,
                     len: 1,
                 },
-                113: SliceInt {
+                114: SliceInt {
                     dest: StatePartIndex<BigSlots>(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     start: 1,
                     len: 1,
                 },
-                114: Copy {
+                115: Copy {
                     dest: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                115: Copy {
+                116: Copy {
                     dest: StatePartIndex<BigSlots>(16), // (0x0) SlotDebugData { name: ".0", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(20), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                116: Copy {
+                117: Copy {
                     dest: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: ".1", ty: Bool },
                     src: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:9:1
-                117: AndBigWithSmallImmediate {
+                118: AndBigWithSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
                     lhs: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b2_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                118: Copy {
+                119: Copy {
                     dest: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                 },
-                119: SliceInt {
+                120: SliceInt {
                     dest: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     src: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     start: 1,
                     len: 2,
                 },
-                120: SliceInt {
+                121: SliceInt {
                     dest: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     start: 0,
                     len: 1,
                 },
-                121: SliceInt {
+                122: SliceInt {
                     dest: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     start: 1,
                     len: 1,
                 },
-                122: Copy {
+                123: Copy {
                     dest: StatePartIndex<BigSlots>(14), // (0x0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                123: Copy {
+                124: Copy {
                     dest: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: ".0", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                124: Copy {
+                125: Copy {
                     dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: ".1", ty: Bool },
                     src: StatePartIndex<BigSlots>(14), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:8:1
-                125: AndBigWithSmallImmediate {
+                126: AndBigWithSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
                     lhs: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::b_out", ty: Enum {HdlNone, HdlSome(Bundle {0: UInt<1>, 1: Bool})} },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:11:1
-                126: BranchIfSmallZero {
-                    target: 131,
+                127: BranchIfSmallZero {
+                    target: 132,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                127: BranchIfSmallNonZero {
-                    target: 130,
+                128: BranchIfSmallNonZero {
+                    target: 131,
                     value: StatePartIndex<SmallSlots>(5), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                128: Copy {
+                129: Copy {
                     dest: StatePartIndex<BigSlots>(23), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(24), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg$next", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                 },
-                129: Branch {
-                    target: 131,
+                130: Branch {
+                    target: 132,
                 },
-                130: Copy {
+                131: Copy {
                     dest: StatePartIndex<BigSlots>(23), // (0x3e) SlotDebugData { name: "InstantiatedModule(enums: enums).enums::the_reg", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                     src: StatePartIndex<BigSlots>(26), // (0x0) SlotDebugData { name: "", ty: Enum {A, B(Bundle {0: UInt<1>, 1: Bool}), C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>})} },
                 },
-                131: XorSmallImmediate {
+                132: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(4), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                132: Return,
+                133: Return,
             ],
             ..
         },
-        pc: 132,
+        pc: 133,
         memory_write_log: [],
         memories: StatePart {
             value: [],
@@ -1187,10 +1191,10 @@ Simulation {
             value: [
                 0,
                 0,
-                0,
-                0,
-                1,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
                 2,
             ],
         },
@@ -1203,110 +1207,110 @@ Simulation {
                 15,
                 2,
                 15,
+                0 (modified),
                 0,
                 0,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
                 0,
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                62,
-                62,
-                0,
-                0,
-                1,
-                1,
-                62,
-                3,
-                1,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                62 (modified),
+                62 (modified),
+                0 (modified),
+                0 (modified),
                 1,
                 1,
+                62 (modified),
+                3 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
                 1,
                 1,
                 -1,
-                1,
-                1,
-                15,
-                3,
-                1,
-                1,
-                3,
-                -1,
-                0,
-                0,
-                1,
-                0,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                1,
-                2,
-                3,
-                12,
-                13,
-                13,
-                13,
-                2,
-                1,
-                1,
-                -1,
-                2,
-                1,
-                1,
-                -1,
-                1,
-                1,
-                1,
-                3,
-                -1,
-                2,
-                3,
-                3,
-                12,
-                15,
-                60,
-                62,
-                62,
-                62,
-                0,
-                0,
-                0,
-                1,
-                2,
-                3,
-                3,
-                1,
-                1,
-                1,
-                1,
-                1,
-                2,
-                3,
-                6,
-                7,
-                7,
-                7,
-                2,
-                3,
-                3,
-                12,
-                15,
+                1 (modified),
+                1 (modified),
+                15 (modified),
+                3 (modified),
+                1 (modified),
+                1 (modified),
+                3 (modified),
+                -1 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                2 (modified),
+                3 (modified),
+                12 (modified),
+                13 (modified),
+                13 (modified),
+                13 (modified),
+                2 (modified),
+                1 (modified),
+                1 (modified),
+                -1 (modified),
+                2 (modified),
+                1 (modified),
+                1 (modified),
+                -1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                3 (modified),
+                -1 (modified),
+                2 (modified),
+                3 (modified),
+                3 (modified),
+                12 (modified),
+                15 (modified),
+                60 (modified),
+                62 (modified),
+                62 (modified),
+                62 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                2 (modified),
+                3 (modified),
+                3 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                2 (modified),
+                3 (modified),
+                6 (modified),
+                7 (modified),
+                7 (modified),
+                7 (modified),
+                2 (modified),
+                3 (modified),
+                3 (modified),
+                12 (modified),
+                15 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -1742,6 +1746,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },
@@ -1750,6 +1755,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1758,6 +1764,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: false,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1767,6 +1774,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<2>,
             },
+            maybe_changed: false,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1776,6 +1784,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<4>,
             },
+            maybe_changed: false,
             state: 0xf,
             last_state: 0xf,
         },
@@ -1785,6 +1794,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1794,6 +1804,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(6),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xf,
             last_state: 0xf,
         },
@@ -1806,6 +1817,7 @@ Simulation {
                     HdlSome(Bundle {0: UInt<1>, 1: Bool}),
                 },
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1815,6 +1827,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(8),
                 ty: UInt<1>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1823,6 +1836,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(9),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1835,6 +1849,7 @@ Simulation {
                     HdlSome(Bundle {0: UInt<1>, 1: Bool}),
                 },
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1844,6 +1859,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(16),
                 ty: UInt<1>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1852,6 +1868,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(17),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1865,6 +1882,7 @@ Simulation {
                     C(Bundle {a: Array<UInt<1>, 2>, b: SInt<2>}),
                 },
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1874,6 +1892,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(27),
                 ty: UInt<1>,
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1882,6 +1901,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(28),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1891,6 +1911,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(34),
                 ty: UInt<1>,
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1900,6 +1921,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(35),
                 ty: UInt<1>,
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1909,6 +1931,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(36),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x3,
             last_state: 0x3,
         },

crates/fayalite/tests/sim/expected/extern_module.txt

@@ -221,6 +221,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: false,
             state: 0x1,
             last_state: 0x1,
         },
@@ -229,6 +230,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },

crates/fayalite/tests/sim/expected/extern_module2.txt

@@ -57,7 +57,7 @@ Simulation {
         big_slots: StatePart {
             value: [
                 0,
-                1,
+                1 (modified),
                 101,
             ],
         },
@@ -280,6 +280,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -288,6 +289,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -297,6 +299,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x65,
             last_state: 0x65,
         },

crates/fayalite/tests/sim/expected/last_connect.txt

@@ -0,0 +1,709 @@
+Simulation {
+    state: State {
+        insns: Insns {
+            state_layout: StateLayout {
+                ty: TypeLayout {
+                    small_slots: StatePartLayout<SmallSlots> {
+                        len: 2,
+                        debug_data: [
+                            SlotDebugData {
+                                name: "",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome,
+                                },
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome,
+                                },
+                            },
+                        ],
+                        ..
+                    },
+                    big_slots: StatePartLayout<BigSlots> {
+                        len: 33,
+                        debug_data: [
+                            SlotDebugData {
+                                name: "InstantiatedModule(last_connect: last_connect).last_connect::inp",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome(Array<Bool, 4>),
+                                },
+                            },
+                            SlotDebugData {
+                                name: "[0]",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "[1]",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "[2]",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "[3]",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<5>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<4>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "InstantiatedModule(last_connect: last_connect).last_connect::out",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome(UInt<8>),
+                                },
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<9>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<9>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome(UInt<8>),
+                                },
+                            },
+                            SlotDebugData {
+                                name: "InstantiatedModule(last_connect: last_connect).last_connect::w",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: ".0",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: ".1",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<1>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<9>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<9>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<9>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: Enum {
+                                    HdlNone,
+                                    HdlSome(UInt<8>),
+                                },
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                            SlotDebugData {
+                                name: "",
+                                ty: UInt<8>,
+                            },
+                        ],
+                        ..
+                    },
+                    sim_only_slots: StatePartLayout<SimOnlySlots> {
+                        len: 0,
+                        debug_data: [],
+                        layout_data: [],
+                        ..
+                    },
+                },
+                memories: StatePartLayout<Memories> {
+                    len: 0,
+                    debug_data: [],
+                    layout_data: [],
+                    ..
+                },
+            },
+            insns: [
+                // at: module-XXXXXXXXXX.rs:1:1
+                0: Const {
+                    dest: StatePartIndex<BigSlots>(32), // (0x3) SlotDebugData { name: "", ty: UInt<8> },
+                    value: 0x3,
+                },
+                1: Const {
+                    dest: StatePartIndex<BigSlots>(31), // (0x2) SlotDebugData { name: "", ty: UInt<8> },
+                    value: 0x2,
+                },
+                2: Const {
+                    dest: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "", ty: UInt<8> },
+                    value: 0x1,
+                },
+                3: Const {
+                    dest: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
+                    value: 0x0,
+                },
+                4: Const {
+                    dest: StatePartIndex<BigSlots>(28), // (0x4) SlotDebugData { name: "", ty: UInt<8> },
+                    value: 0x4,
+                },
+                // at: module-XXXXXXXXXX.rs:8:1
+                5: Copy {
+                    dest: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(28), // (0x4) SlotDebugData { name: "", ty: UInt<8> },
+                },
+                // at: module-XXXXXXXXXX.rs:1:1
+                6: Const {
+                    dest: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                    value: 0x1,
+                },
+                7: Const {
+                    dest: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<9> },
+                    value: 0x0,
+                },
+                8: Copy {
+                    dest: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                    src: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<9> },
+                },
+                // at: module-XXXXXXXXXX.rs:4:1
+                9: Copy {
+                    dest: StatePartIndex<BigSlots>(15), // (0x7) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::out", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                    src: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                },
+                // at: module-XXXXXXXXXX.rs:1:1
+                10: Copy {
+                    dest: StatePartIndex<BigSlots>(5), // (0x1f) SlotDebugData { name: "", ty: UInt<5> },
+                    src: StatePartIndex<BigSlots>(0), // (0x1f) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::inp", ty: Enum {HdlNone, HdlSome(Array<Bool, 4>)} },
+                },
+                11: SliceInt {
+                    dest: StatePartIndex<BigSlots>(6), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
+                    src: StatePartIndex<BigSlots>(5), // (0x1f) SlotDebugData { name: "", ty: UInt<5> },
+                    start: 1,
+                    len: 4,
+                },
+                12: SliceInt {
+                    dest: StatePartIndex<BigSlots>(7), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                    src: StatePartIndex<BigSlots>(6), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
+                    start: 0,
+                    len: 1,
+                },
+                13: Copy {
+                    dest: StatePartIndex<BigSlots>(8), // (0x1) SlotDebugData { name: "", ty: Bool },
+                    src: StatePartIndex<BigSlots>(7), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                },
+                14: SliceInt {
+                    dest: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                    src: StatePartIndex<BigSlots>(6), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
+                    start: 1,
+                    len: 1,
+                },
+                15: Copy {
+                    dest: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "", ty: Bool },
+                    src: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                },
+                16: SliceInt {
+                    dest: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                    src: StatePartIndex<BigSlots>(6), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
+                    start: 2,
+                    len: 1,
+                },
+                17: Copy {
+                    dest: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "", ty: Bool },
+                    src: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                },
+                18: SliceInt {
+                    dest: StatePartIndex<BigSlots>(13), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                    src: StatePartIndex<BigSlots>(6), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
+                    start: 3,
+                    len: 1,
+                },
+                19: Copy {
+                    dest: StatePartIndex<BigSlots>(14), // (0x1) SlotDebugData { name: "", ty: Bool },
+                    src: StatePartIndex<BigSlots>(13), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                },
+                20: Copy {
+                    dest: StatePartIndex<BigSlots>(1), // (0x1) SlotDebugData { name: "[0]", ty: Bool },
+                    src: StatePartIndex<BigSlots>(8), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                21: Copy {
+                    dest: StatePartIndex<BigSlots>(2), // (0x1) SlotDebugData { name: "[1]", ty: Bool },
+                    src: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                22: Copy {
+                    dest: StatePartIndex<BigSlots>(3), // (0x1) SlotDebugData { name: "[2]", ty: Bool },
+                    src: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                23: Copy {
+                    dest: StatePartIndex<BigSlots>(4), // (0x1) SlotDebugData { name: "[3]", ty: Bool },
+                    src: StatePartIndex<BigSlots>(14), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                24: BranchIfZero {
+                    target: 26,
+                    value: StatePartIndex<BigSlots>(1), // (0x1) SlotDebugData { name: "[0]", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:10:1
+                25: Copy {
+                    dest: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                26: BranchIfZero {
+                    target: 28,
+                    value: StatePartIndex<BigSlots>(2), // (0x1) SlotDebugData { name: "[1]", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:10:1
+                27: Copy {
+                    dest: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "", ty: UInt<8> },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                28: BranchIfZero {
+                    target: 30,
+                    value: StatePartIndex<BigSlots>(3), // (0x1) SlotDebugData { name: "[2]", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:10:1
+                29: Copy {
+                    dest: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(31), // (0x2) SlotDebugData { name: "", ty: UInt<8> },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                30: BranchIfZero {
+                    target: 32,
+                    value: StatePartIndex<BigSlots>(4), // (0x1) SlotDebugData { name: "[3]", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:10:1
+                31: Copy {
+                    dest: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(32), // (0x3) SlotDebugData { name: "", ty: UInt<8> },
+                },
+                // at: module-XXXXXXXXXX.rs:1:1
+                32: Copy {
+                    dest: StatePartIndex<BigSlots>(21), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> },
+                    src: StatePartIndex<BigSlots>(23), // (0x1) SlotDebugData { name: "", ty: UInt<1> },
+                },
+                33: Copy {
+                    dest: StatePartIndex<BigSlots>(22), // (0x3) SlotDebugData { name: ".1", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(20), // (0x3) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::w", ty: UInt<8> },
+                },
+                34: Shl {
+                    dest: StatePartIndex<BigSlots>(24), // (0x6) SlotDebugData { name: "", ty: UInt<9> },
+                    lhs: StatePartIndex<BigSlots>(22), // (0x3) SlotDebugData { name: ".1", ty: UInt<8> },
+                    rhs: 1,
+                },
+                35: Or {
+                    dest: StatePartIndex<BigSlots>(25), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                    lhs: StatePartIndex<BigSlots>(21), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> },
+                    rhs: StatePartIndex<BigSlots>(24), // (0x6) SlotDebugData { name: "", ty: UInt<9> },
+                },
+                36: CastToUInt {
+                    dest: StatePartIndex<BigSlots>(26), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                    src: StatePartIndex<BigSlots>(25), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                    dest_width: 9,
+                },
+                37: Copy {
+                    dest: StatePartIndex<BigSlots>(27), // (0x7) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                    src: StatePartIndex<BigSlots>(26), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                },
+                // at: module-XXXXXXXXXX.rs:2:1
+                38: AndBigWithSmallImmediate {
+                    dest: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
+                    lhs: StatePartIndex<BigSlots>(0), // (0x1f) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::inp", ty: Enum {HdlNone, HdlSome(Array<Bool, 4>)} },
+                    rhs: 0x1,
+                },
+                // at: module-XXXXXXXXXX.rs:5:1
+                39: BranchIfSmallNeImmediate {
+                    target: 41,
+                    lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
+                    rhs: 0x1,
+                },
+                // at: module-XXXXXXXXXX.rs:7:1
+                40: Copy {
+                    dest: StatePartIndex<BigSlots>(15), // (0x7) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::out", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                    src: StatePartIndex<BigSlots>(27), // (0x7) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                },
+                // at: module-XXXXXXXXXX.rs:3:1
+                41: AndBigWithSmallImmediate {
+                    dest: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
+                    lhs: StatePartIndex<BigSlots>(15), // (0x7) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::out", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                    rhs: 0x1,
+                },
+                // at: module-XXXXXXXXXX.rs:1:1
+                42: Copy {
+                    dest: StatePartIndex<BigSlots>(16), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                    src: StatePartIndex<BigSlots>(15), // (0x7) SlotDebugData { name: "InstantiatedModule(last_connect: last_connect).last_connect::out", ty: Enum {HdlNone, HdlSome(UInt<8>)} },
+                },
+                43: SliceInt {
+                    dest: StatePartIndex<BigSlots>(17), // (0x3) SlotDebugData { name: "", ty: UInt<8> },
+                    src: StatePartIndex<BigSlots>(16), // (0x7) SlotDebugData { name: "", ty: UInt<9> },
+                    start: 1,
+                    len: 8,
+                },
+                44: Return,
+            ],
+            ..
+        },
+        pc: 44,
+        memory_write_log: [],
+        memories: StatePart {
+            value: [],
+        },
+        small_slots: StatePart {
+            value: [
+                1,
+                1,
+            ],
+        },
+        big_slots: StatePart {
+            value: [
+                31 (modified),
+                1,
+                1,
+                1,
+                1,
+                31 (modified),
+                15 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
+                7 (modified),
+                7 (modified),
+                3,
+                0 (modified),
+                0 (modified),
+                3,
+                1 (modified),
+                3 (modified),
+                1 (modified),
+                6 (modified),
+                7 (modified),
+                7 (modified),
+                7 (modified),
+                4 (modified),
+                0 (modified),
+                1 (modified),
+                2 (modified),
+                3 (modified),
+            ],
+        },
+        sim_only_slots: StatePart {
+            value: [],
+        },
+    },
+    io: Instance {
+        name: <simulator>::last_connect,
+        instantiated: Module {
+            name: last_connect,
+            ..
+        },
+    },
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::last_connect,
+                instantiated: Module {
+                    name: last_connect,
+                    ..
+                },
+            }.inp,
+            Instance {
+                name: <simulator>::last_connect,
+                instantiated: Module {
+                    name: last_connect,
+                    ..
+                },
+            }.out,
+        ],
+        uninitialized_ios: {},
+        io_targets: {
+            Instance {
+                name: <simulator>::last_connect,
+                instantiated: Module {
+                    name: last_connect,
+                    ..
+                },
+            }.inp,
+            Instance {
+                name: <simulator>::last_connect,
+                instantiated: Module {
+                    name: last_connect,
+                    ..
+                },
+            }.out,
+        },
+        did_initial_settle: true,
+        clocks_for_past: {},
+    },
+    extern_modules: [],
+    trace_decls: TraceModule {
+        name: "last_connect",
+        children: [
+            TraceModuleIO {
+                name: "inp",
+                child: TraceEnumWithFields {
+                    name: "inp",
+                    discriminant: TraceEnumDiscriminant {
+                        location: TraceScalarId(0),
+                        name: "$tag",
+                        ty: Enum {
+                            HdlNone,
+                            HdlSome(Array<Bool, 4>),
+                        },
+                        flow: Source,
+                    },
+                    non_empty_fields: [
+                        TraceArray {
+                            name: "HdlSome",
+                            elements: [
+                                TraceBool {
+                                    location: TraceScalarId(1),
+                                    name: "[0]",
+                                    flow: Source,
+                                },
+                                TraceBool {
+                                    location: TraceScalarId(2),
+                                    name: "[1]",
+                                    flow: Source,
+                                },
+                                TraceBool {
+                                    location: TraceScalarId(3),
+                                    name: "[2]",
+                                    flow: Source,
+                                },
+                                TraceBool {
+                                    location: TraceScalarId(4),
+                                    name: "[3]",
+                                    flow: Source,
+                                },
+                            ],
+                            ty: Array<Bool, 4>,
+                            flow: Source,
+                        },
+                    ],
+                    ty: Enum {
+                        HdlNone,
+                        HdlSome(Array<Bool, 4>),
+                    },
+                    flow: Source,
+                },
+                ty: Enum {
+                    HdlNone,
+                    HdlSome(Array<Bool, 4>),
+                },
+                flow: Source,
+            },
+            TraceModuleIO {
+                name: "out",
+                child: TraceEnumWithFields {
+                    name: "out",
+                    discriminant: TraceEnumDiscriminant {
+                        location: TraceScalarId(5),
+                        name: "$tag",
+                        ty: Enum {
+                            HdlNone,
+                            HdlSome(UInt<8>),
+                        },
+                        flow: Sink,
+                    },
+                    non_empty_fields: [
+                        TraceUInt {
+                            location: TraceScalarId(6),
+                            name: "HdlSome",
+                            ty: UInt<8>,
+                            flow: Source,
+                        },
+                    ],
+                    ty: Enum {
+                        HdlNone,
+                        HdlSome(UInt<8>),
+                    },
+                    flow: Sink,
+                },
+                ty: Enum {
+                    HdlNone,
+                    HdlSome(UInt<8>),
+                },
+                flow: Sink,
+            },
+            TraceWire {
+                name: "w",
+                child: TraceUInt {
+                    location: TraceScalarId(7),
+                    name: "w",
+                    ty: UInt<8>,
+                    flow: Duplex,
+                },
+                ty: UInt<8>,
+            },
+        ],
+    },
+    traces: [
+        SimTrace {
+            id: TraceScalarId(0),
+            kind: EnumDiscriminant {
+                index: StatePartIndex<SmallSlots>(0),
+                ty: Enum {
+                    HdlNone,
+                    HdlSome(Array<Bool, 4>),
+                },
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(1),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(1),
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(2),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(2),
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(3),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(3),
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(4),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(4),
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x0,
+        },
+        SimTrace {
+            id: TraceScalarId(5),
+            kind: EnumDiscriminant {
+                index: StatePartIndex<SmallSlots>(1),
+                ty: Enum {
+                    HdlNone,
+                    HdlSome(UInt<8>),
+                },
+            },
+            maybe_changed: true,
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(6),
+            kind: BigUInt {
+                index: StatePartIndex<BigSlots>(17),
+                ty: UInt<8>,
+            },
+            maybe_changed: true,
+            state: 0x03,
+            last_state: 0x02,
+        },
+        SimTrace {
+            id: TraceScalarId(7),
+            kind: BigUInt {
+                index: StatePartIndex<BigSlots>(20),
+                ty: UInt<8>,
+            },
+            maybe_changed: true,
+            state: 0x03,
+            last_state: 0x02,
+        },
+    ],
+    trace_memories: {},
+    trace_writers: [
+        Running(
+            VcdWriter {
+                finished_init: true,
+                timescale: 1 ps,
+                ..
+            },
+        ),
+    ],
+    clocks_triggered: [],
+    event_queue: EventQueue(EventQueueData {
+        instant: 17 μs,
+        events: {},
+    }),
+    waiting_sensitivity_sets_by_address: {},
+    waiting_sensitivity_sets_by_compiled_value: {},
+    ..
+}

crates/fayalite/tests/sim/expected/last_connect.vcd

@@ -0,0 +1,104 @@
+$timescale 1 ps $end
+$scope module last_connect $end
+$scope struct inp $end
+$var string 1 !C&}* \$tag $end
+$scope struct HdlSome $end
+$var wire 1 D_viZ \[0] $end
+$var wire 1 b5gFK \[1] $end
+$var wire 1 xUBRH \[2] $end
+$var wire 1 Gp7Xm \[3] $end
+$upscope $end
+$upscope $end
+$scope struct out $end
+$var string 1 ^Z_p3 \$tag $end
+$var wire 8 rz~), HdlSome $end
+$upscope $end
+$var wire 8 dlea> w $end
+$upscope $end
+$enddefinitions $end
+$dumpvars
+sHdlNone\x20(0) !C&}*
+0D_viZ
+0b5gFK
+0xUBRH
+0Gp7Xm
+sHdlNone\x20(0) ^Z_p3
+b0 rz~),
+b100 dlea>
+$end
+#1000000
+sHdlSome\x20(1) !C&}*
+sHdlSome\x20(1) ^Z_p3
+b100 rz~),
+#2000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#3000000
+1xUBRH
+0Gp7Xm
+b10 rz~),
+b10 dlea>
+#4000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#5000000
+1b5gFK
+0xUBRH
+0Gp7Xm
+b1 rz~),
+b1 dlea>
+#6000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#7000000
+1xUBRH
+0Gp7Xm
+b10 rz~),
+b10 dlea>
+#8000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#9000000
+1D_viZ
+0b5gFK
+0xUBRH
+0Gp7Xm
+b0 rz~),
+b0 dlea>
+#10000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#11000000
+1xUBRH
+0Gp7Xm
+b10 rz~),
+b10 dlea>
+#12000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#13000000
+1b5gFK
+0xUBRH
+0Gp7Xm
+b1 rz~),
+b1 dlea>
+#14000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#15000000
+1xUBRH
+0Gp7Xm
+b10 rz~),
+b10 dlea>
+#16000000
+1Gp7Xm
+b11 rz~),
+b11 dlea>
+#17000000

crates/fayalite/tests/sim/expected/memories.txt

@@ -522,18 +522,18 @@ Simulation {
         },
         small_slots: StatePart {
             value: [
-                1,
-                0,
-                0,
-                1,
-                2,
-                1,
-                0,
-                0,
-                0,
-                2,
-                2,
-                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                2 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                2 (modified),
+                2 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -562,10 +562,10 @@ Simulation {
                 -32,
                 1,
                 1,
-                208,
-                -32,
-                1,
-                1,
+                208 (modified),
+                -32 (modified),
+                1 (modified),
+                1 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -1168,6 +1168,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1176,6 +1177,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1184,6 +1186,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -1193,6 +1196,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xb0,
             last_state: 0xb0,
         },
@@ -1202,6 +1206,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: SInt<8>,
             },
+            maybe_changed: true,
             state: 0xc0,
             last_state: 0xc0,
         },
@@ -1211,6 +1216,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1219,6 +1225,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(6),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1227,6 +1234,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(7),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -1236,6 +1244,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(8),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xd0,
             last_state: 0xd0,
         },
@@ -1245,6 +1254,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(9),
                 ty: SInt<8>,
             },
+            maybe_changed: true,
             state: 0xe0,
             last_state: 0xe0,
         },
@@ -1253,6 +1263,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(10),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1261,6 +1272,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(11),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1270,6 +1282,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(12),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1278,6 +1291,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(13),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1286,6 +1300,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(14),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -1295,6 +1310,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(15),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xb0,
             last_state: 0xb0,
         },
@@ -1304,6 +1320,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(16),
                 ty: SInt<8>,
             },
+            maybe_changed: true,
             state: 0xc0,
             last_state: 0xc0,
         },
@@ -1313,6 +1330,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(17),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -1321,6 +1339,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(18),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1329,6 +1348,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(19),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -1338,6 +1358,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(20),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0xd0,
             last_state: 0xd0,
         },
@@ -1347,6 +1368,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(21),
                 ty: SInt<8>,
             },
+            maybe_changed: true,
             state: 0xe0,
             last_state: 0xe0,
         },
@@ -1355,6 +1377,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(22),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1363,6 +1386,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(23),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },

crates/fayalite/tests/sim/expected/memories2.txt

@@ -545,15 +545,15 @@ Simulation {
             value: [
                 0,
                 0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -568,32 +568,32 @@ Simulation {
                 0,
                 0,
                 0,
+                0 (modified),
                 0,
+                0 (modified),
                 0,
+                0 (modified),
+                0 (modified),
                 0,
+                0 (modified),
+                0 (modified),
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                1,
-                0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                1,
-                1,
-                1,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                1 (modified),
+                1 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -943,6 +943,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -951,6 +952,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -959,6 +961,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -968,6 +971,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<2>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -976,6 +980,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(4),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -985,6 +990,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<2>,
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -993,6 +999,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(6),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1002,6 +1009,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(7),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1010,6 +1018,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(8),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1018,6 +1027,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(9),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -1030,6 +1040,7 @@ Simulation {
                     HdlSome(Bool),
                 },
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1038,6 +1049,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(16),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1046,6 +1058,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(11),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1058,6 +1071,7 @@ Simulation {
                     HdlSome(Bool),
                 },
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1066,6 +1080,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(19),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1074,6 +1089,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(13),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },

crates/fayalite/tests/sim/expected/memories3.txt

@@ -1356,20 +1356,20 @@ Simulation {
         },
         small_slots: StatePart {
             value: [
-                1,
-                0,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -1415,6 +1415,22 @@ Simulation {
                 0,
                 0,
                 0,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
                 0,
                 0,
                 0,
@@ -1434,54 +1450,38 @@ Simulation {
                 0,
                 0,
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -2391,6 +2391,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2399,6 +2400,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2407,6 +2409,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -2416,6 +2419,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2425,6 +2429,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2434,6 +2439,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2443,6 +2449,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(6),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2452,6 +2459,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(7),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2461,6 +2469,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(8),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2470,6 +2479,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(9),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2479,6 +2489,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(10),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2488,6 +2499,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(11),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2496,6 +2508,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(12),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2504,6 +2517,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(13),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -2513,6 +2527,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(14),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2522,6 +2537,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(15),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2531,6 +2547,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(16),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2540,6 +2557,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(17),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2549,6 +2567,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(18),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2558,6 +2577,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(19),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2567,6 +2587,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(20),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2576,6 +2597,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(21),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2584,6 +2606,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(22),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2592,6 +2615,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(23),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2600,6 +2624,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(24),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2608,6 +2633,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(25),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2616,6 +2642,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(26),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2624,6 +2651,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(27),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2632,6 +2660,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(28),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2640,6 +2669,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(29),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2649,6 +2679,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(30),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2657,6 +2688,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(31),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2665,6 +2697,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(32),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -2674,6 +2707,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(33),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2683,6 +2717,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(34),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2692,6 +2727,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(35),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2701,6 +2737,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(36),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2710,6 +2747,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(37),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2719,6 +2757,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(38),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2728,6 +2767,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(39),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2737,6 +2777,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(40),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2746,6 +2787,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(57),
                 ty: UInt<3>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2754,6 +2796,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(58),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2762,6 +2805,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(59),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -2771,6 +2815,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(60),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2780,6 +2825,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(61),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2789,6 +2835,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(62),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2798,6 +2845,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(63),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2807,6 +2855,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(64),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2816,6 +2865,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(65),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2825,6 +2875,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(66),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2834,6 +2885,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(67),
                 ty: UInt<8>,
             },
+            maybe_changed: true,
             state: 0x00,
             last_state: 0x00,
         },
@@ -2842,6 +2894,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(68),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2850,6 +2903,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(69),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2858,6 +2912,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(70),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2866,6 +2921,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(71),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2874,6 +2930,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(72),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2882,6 +2939,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(73),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2890,6 +2948,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(74),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -2898,6 +2957,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(75),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },

crates/fayalite/tests/sim/expected/mod1.txt

@@ -207,11 +207,11 @@ Simulation {
                 -2,
                 -2,
                 15,
-                -2,
-                14,
-                5,
-                1,
-                15,
+                -2 (modified),
+                14 (modified),
+                5 (modified),
+                1 (modified),
+                15 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -445,6 +445,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xa,
             last_state: 0x3,
         },
@@ -454,6 +455,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(1),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x3,
         },
@@ -463,6 +465,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -472,6 +475,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xf,
             last_state: 0xe,
         },
@@ -481,6 +485,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(8),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xa,
             last_state: 0x3,
         },
@@ -490,6 +495,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(9),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x3,
         },
@@ -499,6 +505,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(10),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -508,6 +515,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(11),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xf,
             last_state: 0xe,
         },
@@ -517,6 +525,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xa,
             last_state: 0x3,
         },
@@ -526,6 +535,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x3,
         },
@@ -535,6 +545,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(6),
                 ty: SInt<2>,
             },
+            maybe_changed: true,
             state: 0x2,
             last_state: 0x2,
         },
@@ -544,6 +555,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(7),
                 ty: UInt<4>,
             },
+            maybe_changed: true,
             state: 0xf,
             last_state: 0xe,
         },

crates/fayalite/tests/sim/expected/mod1.vcd

@@ -6,18 +6,12 @@ $var wire 2 Q2~aG o $end
 $var wire 2 DXK'| i2 $end
 $var wire 4 cPuix o2 $end
 $upscope $end
-$scope struct child $end
+$scope module child $end
 $var wire 4 ($5K7 i $end
 $var wire 2 %6Wv" o $end
 $var wire 2 +|-AU i2 $end
 $var wire 4 Hw?%j o2 $end
 $upscope $end
-$scope module mod1_child $end
-$var wire 4 4}s%= i $end
-$var wire 2 }IY?g o $end
-$var wire 2 of42K i2 $end
-$var wire 4 D9]&= o2 $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 $dumpvars
@@ -25,10 +19,6 @@ b11 avK(^
 b11 Q2~aG
 b10 DXK'|
 b1110 cPuix
-b11 4}s%=
-b11 }IY?g
-b10 of42K
-b1110 D9]&=
 b11 ($5K7
 b11 %6Wv"
 b10 +|-AU
@@ -38,9 +28,6 @@ $end
 b1010 avK(^
 b10 Q2~aG
 b1111 cPuix
-b1010 4}s%=
-b10 }IY?g
-b1111 D9]&=
 b1010 ($5K7
 b10 %6Wv"
 b1111 Hw?%j

crates/fayalite/tests/sim/expected/phantom_const.txt

@@ -185,11 +185,11 @@ Simulation {
         },
         small_slots: StatePart {
             value: [
-                1,
-                0,
-                0,
-                0,
-                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -197,11 +197,11 @@ Simulation {
                 0,
                 0,
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -373,6 +373,7 @@ Simulation {
                     ["a","b"],
                 ),
             },
+            maybe_changed: true,
             state: PhantomConst,
             last_state: PhantomConst,
         },
@@ -383,6 +384,7 @@ Simulation {
                     ["a","b"],
                 ),
             },
+            maybe_changed: true,
             state: PhantomConst,
             last_state: PhantomConst,
         },
@@ -392,6 +394,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(0),
                 ty: UInt<0>,
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -400,6 +403,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -408,6 +412,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -418,6 +423,7 @@ Simulation {
                     "mem_element",
                 ),
             },
+            maybe_changed: true,
             state: PhantomConst,
             last_state: PhantomConst,
         },

crates/fayalite/tests/sim/expected/ripple_counter.txt

@@ -314,55 +314,56 @@ Simulation {
                     src: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool },
                     width: 1,
                 },
-                // at: module-XXXXXXXXXX.rs:8:1
-                3: Copy {
-                    dest: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool },
-                    src: StatePartIndex<BigSlots>(52), // (0x1) SlotDebugData { name: "", ty: Bool },
-                },
                 // at: module-XXXXXXXXXX.rs:7:1
-                4: Copy {
+                3: Copy {
                     dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool },
                     src: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                5: Copy {
+                4: Copy {
                     dest: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "", ty: Clock },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:10:1
-                6: Copy {
+                5: Copy {
                     dest: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "", ty: Clock },
                 },
                 // at: module-XXXXXXXXXX.rs:9:1
-                7: Copy {
+                6: Copy {
                     dest: StatePartIndex<BigSlots>(55), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.clk", ty: Clock },
                 },
+                // at: module-XXXXXXXXXX.rs:6:1
+                7: Copy {
+                    dest: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:8:1
                 8: Copy {
+                    dest: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(52), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                9: Copy {
                     dest: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.o", ty: Bool },
                     src: StatePartIndex<BigSlots>(45), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::o", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:11:1
-                9: Copy {
+                10: Copy {
                     dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool },
                     src: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.o", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                10: Copy {
+                11: Copy {
                     dest: StatePartIndex<BigSlots>(51), // (0x0) SlotDebugData { name: "", ty: Clock },
                     src: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool },
                 },
-                11: NotU {
+                12: NotU {
                     dest: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool },
                     width: 1,
                 },
-                // at: module-XXXXXXXXXX.rs:8:1
-                12: Copy {
-                    dest: StatePartIndex<BigSlots>(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool },
-                    src: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
-                },
                 // at: module-XXXXXXXXXX.rs:7:1
                 13: Copy {
                     dest: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", ty: Bool },
@@ -383,256 +384,272 @@ Simulation {
                     dest: StatePartIndex<BigSlots>(44), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(42), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.clk", ty: Clock },
                 },
+                // at: module-XXXXXXXXXX.rs:6:1
                 17: Copy {
+                    dest: StatePartIndex<BigSlots>(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:8:1
+                18: Copy {
+                    dest: StatePartIndex<BigSlots>(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(41), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:9:1
+                19: Copy {
                     dest: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.o", ty: Bool },
                     src: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::o", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:11:1
-                18: Copy {
+                20: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool },
                     src: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.o", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                19: Copy {
+                21: Copy {
                     dest: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "", ty: Clock },
                     src: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool },
                 },
-                20: NotU {
+                22: NotU {
                     dest: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool },
                     width: 1,
                 },
-                // at: module-XXXXXXXXXX.rs:8:1
-                21: Copy {
-                    dest: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool },
-                    src: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "", ty: Bool },
-                },
                 // at: module-XXXXXXXXXX.rs:7:1
-                22: Copy {
+                23: Copy {
                     dest: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool },
                     src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                23: Copy {
+                24: Copy {
                     dest: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "", ty: Clock },
                     src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:10:1
-                24: Copy {
+                25: Copy {
                     dest: StatePartIndex<BigSlots>(31), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "", ty: Clock },
                 },
                 // at: module-XXXXXXXXXX.rs:9:1
-                25: Copy {
+                26: Copy {
                     dest: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(31), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.clk", ty: Clock },
                 },
+                // at: module-XXXXXXXXXX.rs:6:1
+                27: Copy {
+                    dest: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:8:1
+                28: Copy {
+                    dest: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(30), // (0x1) SlotDebugData { name: "", ty: Bool },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
-                26: Const {
+                29: Const {
                     dest: StatePartIndex<BigSlots>(28), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     value: 0x0,
                 },
-                27: Copy {
+                30: Copy {
                     dest: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(28), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                 },
-                28: Copy {
+                31: Copy {
                     dest: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: ".clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(0), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::clk", ty: Clock },
                 },
-                29: Copy {
+                32: Copy {
                     dest: StatePartIndex<BigSlots>(27), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: SyncReset },
                 },
                 // at: module-XXXXXXXXXX.rs:6:1
-                30: IsNonZeroDestIsSmall {
+                33: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(26), // (0x1) SlotDebugData { name: ".clk", ty: Clock },
                 },
-                31: AndSmall {
+                34: AndSmall {
                     dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                32: Copy {
+                35: Copy {
                     dest: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: ".clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "", ty: Clock },
                 },
-                33: Copy {
+                36: Copy {
                     dest: StatePartIndex<BigSlots>(39), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: SyncReset },
                 },
                 // at: module-XXXXXXXXXX.rs:6:1
-                34: IsNonZeroDestIsSmall {
+                37: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(5), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: ".clk", ty: Clock },
                 },
-                35: AndSmall {
+                38: AndSmall {
                     dest: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(5), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(3), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                36: Copy {
+                39: Copy {
                     dest: StatePartIndex<BigSlots>(49), // (0x0) SlotDebugData { name: ".clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(51), // (0x0) SlotDebugData { name: "", ty: Clock },
                 },
-                37: Copy {
+                40: Copy {
                     dest: StatePartIndex<BigSlots>(50), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "", ty: SyncReset },
                 },
                 // at: module-XXXXXXXXXX.rs:6:1
-                38: IsNonZeroDestIsSmall {
+                41: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(49), // (0x0) SlotDebugData { name: ".clk", ty: Clock },
                 },
-                39: AndSmall {
+                42: AndSmall {
                     dest: StatePartIndex<SmallSlots>(7), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(6), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                40: Copy {
+                43: Copy {
                     dest: StatePartIndex<BigSlots>(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[5]", ty: Bool },
                 },
-                41: Shl {
+                44: Shl {
                     dest: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                     lhs: StatePartIndex<BigSlots>(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: 5,
                 },
-                42: Copy {
+                45: Copy {
                     dest: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool },
                 },
-                43: Shl {
+                46: Shl {
                     dest: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: UInt<5> },
                     lhs: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: 4,
                 },
-                44: Copy {
+                47: Copy {
                     dest: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool },
                 },
-                45: Shl {
+                48: Shl {
                     dest: StatePartIndex<BigSlots>(16), // (0x0) SlotDebugData { name: "", ty: UInt<4> },
                     lhs: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: 3,
                 },
-                46: Copy {
+                49: Copy {
                     dest: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", ty: Bool },
                 },
-                47: Shl {
+                50: Shl {
                     dest: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     lhs: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: 2,
                 },
-                48: Copy {
+                51: Copy {
                     dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool },
                 },
-                49: Shl {
+                52: Shl {
                     dest: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     lhs: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: 1,
                 },
-                50: Copy {
+                53: Copy {
                     dest: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool },
                 },
-                51: Or {
+                54: Or {
                     dest: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     lhs: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "", ty: UInt<1> },
                     rhs: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                 },
-                52: Or {
+                55: Or {
                     dest: StatePartIndex<BigSlots>(14), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     lhs: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> },
                     rhs: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                 },
-                53: Or {
+                56: Or {
                     dest: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: "", ty: UInt<4> },
                     lhs: StatePartIndex<BigSlots>(14), // (0x0) SlotDebugData { name: "", ty: UInt<3> },
                     rhs: StatePartIndex<BigSlots>(16), // (0x0) SlotDebugData { name: "", ty: UInt<4> },
                 },
-                54: Or {
+                57: Or {
                     dest: StatePartIndex<BigSlots>(20), // (0x0) SlotDebugData { name: "", ty: UInt<5> },
                     lhs: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: "", ty: UInt<4> },
                     rhs: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "", ty: UInt<5> },
                 },
-                55: Or {
+                58: Or {
                     dest: StatePartIndex<BigSlots>(23), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                     lhs: StatePartIndex<BigSlots>(20), // (0x0) SlotDebugData { name: "", ty: UInt<5> },
                     rhs: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                 },
                 // at: module-XXXXXXXXXX.rs:5:1
-                56: Copy {
+                59: Copy {
                     dest: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::o", ty: UInt<6> },
                     src: StatePartIndex<BigSlots>(23), // (0x0) SlotDebugData { name: "", ty: UInt<6> },
                 },
                 // at: module-XXXXXXXXXX.rs:6:1
-                57: BranchIfSmallZero {
-                    target: 59,
+                60: BranchIfSmallZero {
+                    target: 62,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                58: Copy {
+                61: Copy {
                     dest: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool },
                     src: StatePartIndex<BigSlots>(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool },
                 },
-                59: BranchIfSmallZero {
-                    target: 61,
+                62: BranchIfSmallZero {
+                    target: 64,
                     value: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                60: Copy {
+                63: Copy {
                     dest: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool },
                     src: StatePartIndex<BigSlots>(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool },
                 },
-                61: BranchIfSmallZero {
-                    target: 63,
+                64: BranchIfSmallZero {
+                    target: 66,
                     value: StatePartIndex<SmallSlots>(7), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                62: Copy {
+                65: Copy {
                     dest: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool },
                     src: StatePartIndex<BigSlots>(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool },
                 },
-                63: XorSmallImmediate {
+                66: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
-                64: XorSmallImmediate {
+                67: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(3), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(5), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
-                65: XorSmallImmediate {
+                68: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(6), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                66: Return,
+                69: Return,
             ],
             ..
         },
-        pc: 66,
+        pc: 69,
         memory_write_log: [],
         memories: StatePart {
             value: [],
         },
         small_slots: StatePart {
             value: [
-                0,
-                0,
-                1,
-                1,
-                0,
-                0,
-                1,
-                0,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -645,56 +662,56 @@ Simulation {
                 0,
                 0,
                 0,
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                0,
+                1 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
                 0,
                 0,
+                0 (modified),
+                0,
+                0 (modified),
+                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
                 0,
                 0,
+                0 (modified),
+                0,
+                0 (modified),
+                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
                 0,
                 0,
+                0 (modified),
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                1,
-                1,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                1,
-                0,
-                0,
-                0,
-                0,
-                0,
+                0 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -1267,6 +1284,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: false,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1276,6 +1294,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(1),
                 ty: UInt<6>,
             },
+            maybe_changed: false,
             state: 0x00,
             last_state: 0x00,
         },
@@ -1284,6 +1303,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1292,6 +1312,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(3),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1300,6 +1321,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(4),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1308,6 +1330,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(5),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1316,6 +1339,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(6),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1324,6 +1348,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(7),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1332,6 +1357,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(24),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1340,6 +1366,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(33),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1348,6 +1375,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(34),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1356,6 +1384,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(31),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1364,6 +1393,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(32),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1372,6 +1402,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(36),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1380,6 +1411,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(44),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1388,6 +1420,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(45),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1396,6 +1429,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(42),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1404,6 +1438,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(43),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1412,6 +1447,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(47),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1420,6 +1456,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(55),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1428,6 +1465,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(56),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1436,6 +1474,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(53),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1444,6 +1483,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(54),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },

crates/fayalite/tests/sim/expected/shift_register.txt

@@ -103,147 +103,166 @@ Simulation {
                     dest: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::q", ty: Bool },
                     src: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3", ty: Bool },
                 },
-                // at: module-XXXXXXXXXX.rs:12:1
+                // at: module-XXXXXXXXXX.rs:11:1
                 1: Copy {
+                    dest: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:12:1
+                2: Copy {
                     dest: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3$next", ty: Bool },
                     src: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2", ty: Bool },
                 },
+                // at: module-XXXXXXXXXX.rs:9:1
+                3: Copy {
+                    dest: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2", ty: Bool },
+                },
                 // at: module-XXXXXXXXXX.rs:10:1
-                2: Copy {
+                4: Copy {
                     dest: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2$next", ty: Bool },
                     src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1", ty: Bool },
                 },
+                // at: module-XXXXXXXXXX.rs:7:1
+                5: Copy {
+                    dest: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1", ty: Bool },
+                },
                 // at: module-XXXXXXXXXX.rs:8:1
-                3: Copy {
+                6: Copy {
                     dest: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1$next", ty: Bool },
                     src: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0", ty: Bool },
                 },
-                // at: module-XXXXXXXXXX.rs:6:1
-                4: Copy {
-                    dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0$next", ty: Bool },
-                    src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::d", ty: Bool },
-                },
                 // at: module-XXXXXXXXXX.rs:5:1
-                5: IsNonZeroDestIsSmall {
+                7: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.rst", ty: SyncReset },
                 },
-                6: IsNonZeroDestIsSmall {
+                8: IsNonZeroDestIsSmall {
                     dest: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     src: StatePartIndex<BigSlots>(0), // (0x1) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.clk", ty: Clock },
                 },
-                7: AndSmall {
+                9: AndSmall {
                     dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
+                10: Copy {
+                    dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:6:1
+                11: Copy {
+                    dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::d", ty: Bool },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
-                8: Const {
+                12: Const {
                     dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Bool },
                     value: 0x0,
                 },
                 // at: module-XXXXXXXXXX.rs:5:1
-                9: BranchIfSmallZero {
-                    target: 14,
+                13: BranchIfSmallZero {
+                    target: 18,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                10: BranchIfSmallNonZero {
-                    target: 13,
+                14: BranchIfSmallNonZero {
+                    target: 17,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                11: Copy {
+                15: Copy {
                     dest: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0", ty: Bool },
                     src: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0$next", ty: Bool },
                 },
-                12: Branch {
-                    target: 14,
+                16: Branch {
+                    target: 18,
                 },
-                13: Copy {
+                17: Copy {
                     dest: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg0", ty: Bool },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:7:1
-                14: BranchIfSmallZero {
-                    target: 19,
+                18: BranchIfSmallZero {
+                    target: 23,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                15: BranchIfSmallNonZero {
-                    target: 18,
+                19: BranchIfSmallNonZero {
+                    target: 22,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                16: Copy {
+                20: Copy {
                     dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1", ty: Bool },
                     src: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1$next", ty: Bool },
                 },
-                17: Branch {
-                    target: 19,
+                21: Branch {
+                    target: 23,
                 },
-                18: Copy {
+                22: Copy {
                     dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg1", ty: Bool },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:9:1
-                19: BranchIfSmallZero {
-                    target: 24,
+                23: BranchIfSmallZero {
+                    target: 28,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                20: BranchIfSmallNonZero {
-                    target: 23,
+                24: BranchIfSmallNonZero {
+                    target: 27,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                21: Copy {
+                25: Copy {
                     dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2", ty: Bool },
                     src: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2$next", ty: Bool },
                 },
-                22: Branch {
-                    target: 24,
+                26: Branch {
+                    target: 28,
                 },
-                23: Copy {
+                27: Copy {
                     dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg2", ty: Bool },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:11:1
-                24: BranchIfSmallZero {
-                    target: 29,
+                28: BranchIfSmallZero {
+                    target: 33,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                25: BranchIfSmallNonZero {
-                    target: 28,
+                29: BranchIfSmallNonZero {
+                    target: 32,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                26: Copy {
+                30: Copy {
                     dest: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3", ty: Bool },
                     src: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3$next", ty: Bool },
                 },
-                27: Branch {
-                    target: 29,
+                31: Branch {
+                    target: 33,
                 },
-                28: Copy {
+                32: Copy {
                     dest: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "InstantiatedModule(shift_register: shift_register).shift_register::reg3", ty: Bool },
                     src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:5:1
-                29: XorSmallImmediate {
+                33: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                30: Return,
+                34: Return,
             ],
             ..
         },
-        pc: 30,
+        pc: 34,
         memory_write_log: [],
         memories: StatePart {
             value: [],
         },
         small_slots: StatePart {
             value: [
-                0,
-                0,
-                1,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -253,14 +272,14 @@ Simulation {
                 0,
                 0,
                 0,
+                0 (modified),
+                0 (modified),
                 0,
+                0 (modified),
                 0,
+                0 (modified),
                 0,
-                0,
-                0,
-                0,
-                0,
-                0,
+                0 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -439,6 +458,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x0,
         },
@@ -447,6 +467,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -455,6 +476,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -463,6 +485,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(3),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -471,6 +494,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(4),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -479,6 +503,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(7),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -487,6 +512,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(9),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -495,6 +521,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(11),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },

crates/fayalite/tests/sim/expected/sim_fork_join.txt

@@ -68,12 +68,12 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
+                0 (modified),
                 0,
                 0,
-                0,
-                49,
-                50,
-                50,
+                49 (modified),
+                50 (modified),
+                50 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -356,6 +356,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -364,6 +365,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -372,6 +374,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -381,6 +384,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x31,
             last_state: 0x31,
         },
@@ -390,6 +394,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },
@@ -399,6 +404,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },

crates/fayalite/tests/sim/expected/sim_fork_join_scope.txt

@@ -68,12 +68,12 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
+                0 (modified),
                 0,
                 0,
-                0,
-                49,
-                50,
-                50,
+                49 (modified),
+                50 (modified),
+                50 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -356,6 +356,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -364,6 +365,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -372,6 +374,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -381,6 +384,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x31,
             last_state: 0x31,
         },
@@ -390,6 +394,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },
@@ -399,6 +404,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },

crates/fayalite/tests/sim/expected/sim_only_connects.txt

@@ -212,55 +212,55 @@ Simulation {
                     dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "", ty: Bool },
                     value: 0x0,
                 },
-                // at: module-XXXXXXXXXX.rs:17:1
-                7: Copy {
-                    dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty$next", ty: Bool },
-                    src: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "", ty: Bool },
-                },
-                // at: module-XXXXXXXXXX.rs:16:1
-                8: CloneSimOnly {
-                    dest: StatePartIndex<SimOnlySlots>(9), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1$next", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
-                    src: StatePartIndex<SimOnlySlots>(0), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
-                },
                 // at: module-XXXXXXXXXX.rs:12:1
-                9: CloneSimOnly {
+                7: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(1), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::out1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(8), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:13:1
-                10: BranchIfZero {
-                    target: 12,
+                8: BranchIfZero {
+                    target: 10,
                     value: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:15:1
-                11: CloneSimOnly {
+                9: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(1), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::out1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(0), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:11:1
-                12: CloneSimOnly {
+                10: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(4), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(8), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:13:1
-                13: BranchIfZero {
-                    target: 15,
+                11: BranchIfZero {
+                    target: 13,
                     value: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:14:1
-                14: CloneSimOnly {
+                12: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(4), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(0), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:10:1
-                15: Copy {
+                13: Copy {
                     dest: StatePartIndex<BigSlots>(2), // (0x1) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.cd.clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(0), // (0x1) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::cd.clk", ty: Clock },
                 },
-                16: Copy {
+                14: Copy {
                     dest: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.cd.rst", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::cd.rst", ty: SyncReset },
                 },
+                // at: module-XXXXXXXXXX.rs:9:1
+                15: Copy {
+                    dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty", ty: Bool },
+                },
+                // at: module-XXXXXXXXXX.rs:17:1
+                16: Copy {
+                    dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty$next", ty: Bool },
+                    src: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "", ty: Bool },
+                },
                 // at: module-XXXXXXXXXX.rs:1:1
                 17: Const {
                     dest: StatePartIndex<BigSlots>(8), // (0x1) SlotDebugData { name: "", ty: Bool },
@@ -280,101 +280,110 @@ Simulation {
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                // at: module-XXXXXXXXXX.rs:7:1
                 21: CloneSimOnly {
+                    dest: StatePartIndex<SimOnlySlots>(9), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1$next", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
+                    src: StatePartIndex<SimOnlySlots>(8), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
+                },
+                // at: module-XXXXXXXXXX.rs:16:1
+                22: CloneSimOnly {
+                    dest: StatePartIndex<SimOnlySlots>(9), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1$next", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
+                    src: StatePartIndex<SimOnlySlots>(0), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
+                },
+                // at: module-XXXXXXXXXX.rs:7:1
+                23: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(5), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.out", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(7), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects.helper1: sim_only_connects_helper).sim_only_connects_helper::out", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:18:1
-                22: CloneSimOnly {
+                24: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(2), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::out2", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(5), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.out", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:21:1
-                23: CloneSimOnly {
+                25: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(11), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper2.inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(2), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::out2", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:19:1
-                24: CloneSimOnly {
+                26: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(13), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects.helper2: sim_only_connects_helper).sim_only_connects_helper::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(11), // ({"bar": "", "extra": "value", "foo": "baz"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper2.inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:7:1
-                25: CloneSimOnly {
+                27: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(6), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects.helper1: sim_only_connects_helper).sim_only_connects_helper::inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(4), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.inp", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
-                26: Copy {
+                28: Copy {
                     dest: StatePartIndex<BigSlots>(4), // (0x1) SlotDebugData { name: "InstantiatedModule(sim_only_connects.helper1: sim_only_connects_helper).sim_only_connects_helper::cd.clk", ty: Clock },
                     src: StatePartIndex<BigSlots>(2), // (0x1) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.cd.clk", ty: Clock },
                 },
-                27: Copy {
+                29: Copy {
                     dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects.helper1: sim_only_connects_helper).sim_only_connects_helper::cd.rst", ty: SyncReset },
                     src: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::helper1.cd.rst", ty: SyncReset },
                 },
                 // at: module-XXXXXXXXXX.rs:8:1
-                28: BranchIfSmallZero {
-                    target: 33,
+                30: BranchIfSmallZero {
+                    target: 35,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                29: BranchIfSmallNonZero {
-                    target: 32,
+                31: BranchIfSmallNonZero {
+                    target: 34,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                30: CloneSimOnly {
+                32: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(8), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(9), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1$next", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
-                31: Branch {
-                    target: 33,
+                33: Branch {
+                    target: 35,
                 },
-                32: CloneSimOnly {
+                34: CloneSimOnly {
                     dest: StatePartIndex<SimOnlySlots>(8), // ({"extra": "value"}) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                     src: StatePartIndex<SimOnlySlots>(10), // ({}) SlotDebugData { name: "", ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>> },
                 },
                 // at: module-XXXXXXXXXX.rs:9:1
-                33: BranchIfSmallZero {
-                    target: 38,
+                35: BranchIfSmallZero {
+                    target: 40,
                     value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                34: BranchIfSmallNonZero {
-                    target: 37,
+                36: BranchIfSmallNonZero {
+                    target: 39,
                     value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                 },
-                35: Copy {
+                37: Copy {
                     dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty", ty: Bool },
                     src: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty$next", ty: Bool },
                 },
-                36: Branch {
-                    target: 38,
+                38: Branch {
+                    target: 40,
                 },
-                37: Copy {
+                39: Copy {
                     dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(sim_only_connects: sim_only_connects).sim_only_connects::delay1_empty", ty: Bool },
                     src: StatePartIndex<BigSlots>(8), // (0x1) SlotDebugData { name: "", ty: Bool },
                 },
                 // at: module-XXXXXXXXXX.rs:8:1
-                38: XorSmallImmediate {
+                40: XorSmallImmediate {
                     dest: StatePartIndex<SmallSlots>(0), // (0x0 0) SlotDebugData { name: "", ty: Bool },
                     lhs: StatePartIndex<SmallSlots>(2), // (0x1 1) SlotDebugData { name: "", ty: Bool },
                     rhs: 0x1,
                 },
                 // at: module-XXXXXXXXXX.rs:1:1
-                39: Return,
+                41: Return,
             ],
             ..
         },
-        pc: 39,
+        pc: 41,
         memory_write_log: [],
         memories: StatePart {
             value: [],
         },
         small_slots: StatePart {
             value: [
-                0,
-                0,
-                1,
-                0,
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
@@ -383,15 +392,15 @@ Simulation {
                 0,
                 1,
                 0,
+                1 (modified),
+                0,
+                0,
+                0 (modified),
+                1 (modified),
+                0 (modified),
                 1,
                 0,
-                0,
-                0,
-                1,
-                0,
-                1,
-                0,
-                1,
+                1 (modified),
                 0,
             ],
         },
@@ -434,8 +443,8 @@ Simulation {
                 },
                 {
                     "extra": "value",
-                },
-                {},
+                } (modified),
+                {} (modified),
                 {
                     "bar": "",
                     "extra": "value",
@@ -1243,6 +1252,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1251,6 +1261,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1260,6 +1271,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(0),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "extra": "value",
             },
@@ -1273,6 +1285,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(1),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "extra": "value",
             },
@@ -1286,6 +1299,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(2),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "",
                 "extra": "value",
@@ -1303,6 +1317,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(3),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "baz",
                 "extra": "value",
@@ -1319,6 +1334,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(4),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1327,6 +1343,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(5),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1336,6 +1353,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(6),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "extra": "value",
             },
@@ -1349,6 +1367,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(7),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "",
                 "extra": "value",
@@ -1365,6 +1384,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1373,6 +1393,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(3),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1382,6 +1403,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(4),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "extra": "value",
             },
@@ -1395,6 +1417,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(5),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "",
                 "extra": "value",
@@ -1412,6 +1435,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(8),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "extra": "value",
             },
@@ -1424,6 +1448,7 @@ Simulation {
             kind: BigBool {
                 index: StatePartIndex<BigSlots>(6),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1432,6 +1457,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(12),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1440,6 +1466,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(13),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1449,6 +1476,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(13),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "",
                 "extra": "value",
@@ -1466,6 +1494,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(14),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "baz",
                 "extra": "value",
@@ -1482,6 +1511,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(10),
             },
+            maybe_changed: true,
             state: 0x1,
             last_state: 0x1,
         },
@@ -1490,6 +1520,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(11),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -1499,6 +1530,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(11),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "",
                 "extra": "value",
@@ -1516,6 +1548,7 @@ Simulation {
                 index: StatePartIndex<SimOnlySlots>(12),
                 ty: SimOnly<alloc::collections::btree::map::BTreeMap<alloc::string::String, alloc::rc::Rc<str>>>,
             },
+            maybe_changed: true,
             state: {
                 "bar": "baz",
                 "extra": "value",

crates/fayalite/tests/sim/expected/sim_only_connects.vcd

@@ -8,7 +8,7 @@ $var string 1 g:xf? inp $end
 $var string 1 [OKKg out1 $end
 $var string 1 9pB-> out2 $end
 $var string 1 8(7-4 out3 $end
-$scope struct helper1 $end
+$scope module helper1 $end
 $scope struct cd $end
 $var wire 1 $Kwp\ clk $end
 $var wire 1 nmVq' rst $end
@@ -16,17 +16,9 @@ $upscope $end
 $var string 1 qS)@z inp $end
 $var string 1 ~je// out $end
 $upscope $end
-$scope module sim_only_connects_helper $end
-$scope struct cd $end
-$var wire 1 %uCn6 clk $end
-$var wire 1 Apu`K rst $end
-$upscope $end
-$var string 1 $U*lA inp $end
-$var string 1 !prwC out $end
-$upscope $end
 $var string 1 CyjVm delay1 $end
 $var reg 1 z~g{\ delay1_empty $end
-$scope struct helper2 $end
+$scope module helper2 $end
 $scope struct cd $end
 $var wire 1 Ph.=# clk $end
 $var wire 1 !GXK\ rst $end
@@ -34,14 +26,6 @@ $upscope $end
 $var string 1 /YVv: inp $end
 $var string 1 Kk*{# out $end
 $upscope $end
-$scope module sim_only_connects_helper_2 $end
-$scope struct cd $end
-$var wire 1 %uCn6" clk $end
-$var wire 1 Apu`K" rst $end
-$upscope $end
-$var string 1 $U*lA" inp $end
-$var string 1 !prwC" out $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 $dumpvars
@@ -51,20 +35,12 @@ s{\"extra\":\x20\"value\"} g:xf?
 s{} [OKKg
 s{} 9pB->
 s{} 8(7-4
-0%uCn6
-1Apu`K
-s{} $U*lA
-s{} !prwC
 0$Kwp\
 1nmVq'
 s{} qS)@z
 s{} ~je//
 s{} CyjVm
 0z~g{\
-0%uCn6"
-1Apu`K"
-s{} $U*lA"
-s{} !prwC"
 0Ph.=#
 1!GXK\
 s{} /YVv:
@@ -73,110 +49,74 @@ $end
 #1000000
 1tq:(w
 s{\"extra\":\x20\"value\"} [OKKg
-1%uCn6
-s{\"extra\":\x20\"value\"} $U*lA
 1$Kwp\
 s{\"extra\":\x20\"value\"} qS)@z
 1z~g{\
-1%uCn6"
 1Ph.=#
 s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 9pB->
-s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} !prwC
 s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} ~je//
-s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} $U*lA"
 s{\"bar\":\x20\"\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} /YVv:
 s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} 8(7-4
-s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} !prwC"
 s{\"bar\":\x20\"baz\",\x20\"extra\":\x20\"value\",\x20\"foo\":\x20\"baz\"} Kk*{#
 #2000000
 0tq:(w
 0FVlgb
-0%uCn6
-0Apu`K
 0$Kwp\
 0nmVq'
-0%uCn6"
-0Apu`K"
 0Ph.=#
 0!GXK\
 #3000000
 1tq:(w
-1%uCn6
 1$Kwp\
 s{\"extra\":\x20\"value\"} CyjVm
 0z~g{\
-1%uCn6"
 1Ph.=#
 #4000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #5000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #6000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #7000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #8000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #9000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #10000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #11000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #12000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #13000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #14000000
 0tq:(w
-0%uCn6
 0$Kwp\
-0%uCn6"
 0Ph.=#
 #15000000
 1tq:(w
-1%uCn6
 1$Kwp\
-1%uCn6"
 1Ph.=#
 #16000000

crates/fayalite/tests/sim/expected/sim_read_past.txt

@@ -517,67 +517,67 @@ Simulation {
         },
         small_slots: StatePart {
             value: [
-                1,
-                0,
-                0,
-                1,
-                0,
-                0,
-                1,
-                0,
-                0,
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
             ],
         },
         big_slots: StatePart {
             value: [
+                0 (modified),
                 0,
                 0,
-                0,
-                49,
-                50,
-                50,
-                0,
-                1,
-                0,
-                49,
-                49,
-                50,
-                1,
-                0,
-                0,
-                48,
-                49,
-                49,
-                0,
-                0,
-                1,
-                48,
-                49,
-                48,
-                0,
-                1,
-                0,
-                49,
-                49,
-                50,
-                0,
-                0,
-                1,
-                49,
-                49,
-                49,
-                0,
-                0,
-                1,
-                49,
-                50,
-                50,
-                0,
-                1,
-                0,
-                49,
-                49,
-                50,
+                49 (modified),
+                50 (modified),
+                50 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                49 (modified),
+                49 (modified),
+                50 (modified),
+                1 (modified),
+                0 (modified),
+                0 (modified),
+                48 (modified),
+                49 (modified),
+                49 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                48 (modified),
+                49 (modified),
+                48 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                49 (modified),
+                49 (modified),
+                50 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                49 (modified),
+                49 (modified),
+                49 (modified),
+                0 (modified),
+                0 (modified),
+                1 (modified),
+                49 (modified),
+                50 (modified),
+                50 (modified),
+                0 (modified),
+                1 (modified),
+                0 (modified),
+                49 (modified),
+                49 (modified),
+                50 (modified),
             ],
         },
         sim_only_slots: StatePart {
@@ -9500,6 +9500,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -9508,6 +9509,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -9516,6 +9518,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(2),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x1,
         },
@@ -9525,6 +9528,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(3),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x31,
             last_state: 0x31,
         },
@@ -9534,6 +9538,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(4),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },
@@ -9543,6 +9548,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(5),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },
@@ -9551,6 +9557,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(6),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -9559,6 +9566,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(7),
             },
+            maybe_changed: false,
             state: 0x1,
             last_state: 0x1,
         },
@@ -9567,6 +9575,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(8),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -9576,6 +9585,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(9),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x31,
             last_state: 0x31,
         },
@@ -9585,6 +9595,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(10),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x31,
             last_state: 0x31,
         },
@@ -9594,6 +9605,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(11),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x32,
             last_state: 0x32,
         },

crates/fayalite/tests/sim/expected/sim_resettable_counter_async.txt

@@ -56,8 +56,8 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
-                0,
-                0,
+                0 (modified),
+                0 (modified),
                 3,
             ],
         },
@@ -310,6 +310,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -318,6 +319,7 @@ Simulation {
             kind: BigAsyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -327,6 +329,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x03,
             last_state: 0x03,
         },

crates/fayalite/tests/sim/expected/sim_resettable_counter_async_immediate_reset.txt

@@ -56,8 +56,8 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
-                0,
-                0,
+                0 (modified),
+                0 (modified),
                 3,
             ],
         },
@@ -310,6 +310,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -318,6 +319,7 @@ Simulation {
             kind: BigAsyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -327,6 +329,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x03,
             last_state: 0x03,
         },

crates/fayalite/tests/sim/expected/sim_resettable_counter_sync.txt

@@ -56,7 +56,7 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
-                0,
+                0 (modified),
                 0,
                 3,
             ],
@@ -310,6 +310,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -318,6 +319,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -327,6 +329,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x03,
             last_state: 0x03,
         },

crates/fayalite/tests/sim/expected/sim_resettable_counter_sync_immediate_reset.txt

@@ -56,7 +56,7 @@ Simulation {
         },
         big_slots: StatePart {
             value: [
-                0,
+                0 (modified),
                 0,
                 3,
             ],
@@ -310,6 +310,7 @@ Simulation {
             kind: BigClock {
                 index: StatePartIndex<BigSlots>(0),
             },
+            maybe_changed: true,
             state: 0x0,
             last_state: 0x0,
         },
@@ -318,6 +319,7 @@ Simulation {
             kind: BigSyncReset {
                 index: StatePartIndex<BigSlots>(1),
             },
+            maybe_changed: false,
             state: 0x0,
             last_state: 0x0,
         },
@@ -327,6 +329,7 @@ Simulation {
                 index: StatePartIndex<BigSlots>(2),
                 ty: UInt<8>,
             },
+            maybe_changed: false,
             state: 0x03,
             last_state: 0x03,
         },

crates/fayalite/tests/ui/simvalue_is_not_internable.stderr

@@ -48,48 +48,60 @@ note: required by a bound in `fayalite::intern::Interned`
 error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
  --> tests/ui/simvalue_is_not_internable.rs:11:26
   |
- 11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
-    |                          ^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
-    |
-    = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
+  11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
+     |                          ^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
+     |
+     = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
 note: required because it appears within the type `DynSimOnlyValue`
-   --> src/sim/value/sim_only_value_unsafe.rs
-    |
-    | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
-    |            ^^^^^^^^^^^^^^^
+    --> src/sim/value/sim_only_value_unsafe.rs
+     |
+ 271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
+     |            ^^^^^^^^^^^^^^^
 note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
-   --> $RUST/core/src/marker.rs
+    --> $RUST/core/src/marker.rs
+     |
+ 819 | pub struct PhantomData<T: PointeeSized>;
+     |            ^^^^^^^^^^^
 note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/raw_vec/mod.rs
+    --> $RUST/alloc/src/raw_vec/mod.rs
+     |
+  73 | pub(crate) struct RawVec<T, A: Allocator = Global> {
+     |                   ^^^^^^
 note: required because it appears within the type `Vec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/vec/mod.rs
+    --> $RUST/alloc/src/vec/mod.rs
+     |
+ 438 | pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
+     |            ^^^
 note: required because it appears within the type `OpaqueSimValue`
-   --> src/ty.rs
-    |
-    | pub struct OpaqueSimValue {
-    |            ^^^^^^^^^^^^^^
+    --> src/ty.rs
+     |
+ 761 | pub struct OpaqueSimValue {
+     |            ^^^^^^^^^^^^^^
 note: required because it appears within the type `value::SimValueInner<()>`
-   --> src/sim/value.rs
-    |
- 51 | struct SimValueInner<T: Type> {
-    |        ^^^^^^^^^^^^^
+    --> src/sim/value.rs
+     |
+  52 | struct SimValueInner<T: Type> {
+     |        ^^^^^^^^^^^^^
 note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
-   --> $RUST/core/src/cell.rs
+    --> $RUST/core/src/cell.rs
+     |
+     | pub struct UnsafeCell<T: ?Sized> {
+     |            ^^^^^^^^^^
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
-   --> src/util/alternating_cell.rs
-    |
- 22 | pub(crate) struct AlternatingCell<T: ?Sized> {
-    |                   ^^^^^^^^^^^^^^^
+    --> src/util/alternating_cell.rs
+     |
+  22 | pub(crate) struct AlternatingCell<T: ?Sized> {
+     |                   ^^^^^^^^^^^^^^^
 note: required because it appears within the type `fayalite::prelude::SimValue<()>`
-   --> src/sim/value.rs
-    |
-    | pub struct SimValue<T: Type> {
-    |            ^^^^^^^^
+    --> src/sim/value.rs
+     |
+ 161 | pub struct SimValue<T: Type> {
+     |            ^^^^^^^^
 note: required by a bound in `fayalite::intern::Interned`
-   --> src/intern.rs
-    |
-    | pub struct Interned<T: ?Sized + 'static + Send + Sync> {
-    |                                           ^^^^ required by this bound in `Interned`
+    --> src/intern.rs
+     |
+ 648 | pub struct Interned<T: ?Sized + 'static + Send + Sync> {
+     |                                           ^^^^ required by this bound in `Interned`
 
 error[E0277]: the trait bound `fayalite::prelude::SimValue<()>: Intern` is not satisfied
   --> tests/ui/simvalue_is_not_internable.rs:12:26
@@ -173,57 +185,69 @@ help: consider dereferencing here
 error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
  --> tests/ui/simvalue_is_not_internable.rs:12:26
   |
- 12 |     Intern::intern_sized(v)
-    |     -------------------- ^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
-    |     |
-    |     required by a bound introduced by this call
-    |
-    = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
+  12 |     Intern::intern_sized(v)
+     |     -------------------- ^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
+     |     |
+     |     required by a bound introduced by this call
+     |
+     = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
 note: required because it appears within the type `DynSimOnlyValue`
-   --> src/sim/value/sim_only_value_unsafe.rs
-    |
-    | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
-    |            ^^^^^^^^^^^^^^^
+    --> src/sim/value/sim_only_value_unsafe.rs
+     |
+ 271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
+     |            ^^^^^^^^^^^^^^^
 note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
-   --> $RUST/core/src/marker.rs
+    --> $RUST/core/src/marker.rs
+     |
+ 819 | pub struct PhantomData<T: PointeeSized>;
+     |            ^^^^^^^^^^^
 note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/raw_vec/mod.rs
+    --> $RUST/alloc/src/raw_vec/mod.rs
+     |
+  73 | pub(crate) struct RawVec<T, A: Allocator = Global> {
+     |                   ^^^^^^
 note: required because it appears within the type `Vec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/vec/mod.rs
+    --> $RUST/alloc/src/vec/mod.rs
+     |
+ 438 | pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
+     |            ^^^
 note: required because it appears within the type `OpaqueSimValue`
-   --> src/ty.rs
-    |
-    | pub struct OpaqueSimValue {
-    |            ^^^^^^^^^^^^^^
+    --> src/ty.rs
+     |
+ 761 | pub struct OpaqueSimValue {
+     |            ^^^^^^^^^^^^^^
 note: required because it appears within the type `value::SimValueInner<()>`
-   --> src/sim/value.rs
-    |
- 51 | struct SimValueInner<T: Type> {
-    |        ^^^^^^^^^^^^^
+    --> src/sim/value.rs
+     |
+  52 | struct SimValueInner<T: Type> {
+     |        ^^^^^^^^^^^^^
 note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
-   --> $RUST/core/src/cell.rs
+    --> $RUST/core/src/cell.rs
+     |
+     | pub struct UnsafeCell<T: ?Sized> {
+     |            ^^^^^^^^^^
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
-   --> src/util/alternating_cell.rs
-    |
- 22 | pub(crate) struct AlternatingCell<T: ?Sized> {
-    |                   ^^^^^^^^^^^^^^^
+    --> src/util/alternating_cell.rs
+     |
+  22 | pub(crate) struct AlternatingCell<T: ?Sized> {
+     |                   ^^^^^^^^^^^^^^^
 note: required because it appears within the type `fayalite::prelude::SimValue<()>`
-   --> src/sim/value.rs
-    |
-    | pub struct SimValue<T: Type> {
-    |            ^^^^^^^^
+    --> src/sim/value.rs
+     |
+ 161 | pub struct SimValue<T: Type> {
+     |            ^^^^^^^^
 note: required by a bound in `intern_sized`
-   --> src/intern.rs
-    |
-    | pub trait Intern: Any + Send + Sync {
-    |                         ^^^^ required by this bound in `Intern::intern_sized`
+    --> src/intern.rs
+     |
+ 596 | pub trait Intern: Any + Send + Sync {
+     |                         ^^^^ required by this bound in `Intern::intern_sized`
 ...
-    |     fn intern_sized(self) -> Interned<Self>
-    |        ------------ required by a bound in this associated function
+ 604 |     fn intern_sized(self) -> Interned<Self>
+     |        ------------ required by a bound in this associated function
 help: consider dereferencing here
-    |
- 12 |     Intern::intern_sized(*v)
-    |                          +
+     |
+  12 |     Intern::intern_sized(*v)
+     |                          +
 
 error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
  --> tests/ui/simvalue_is_not_internable.rs:12:5
@@ -275,45 +299,57 @@ note: required by a bound in `fayalite::intern::Interned`
 error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
  --> tests/ui/simvalue_is_not_internable.rs:12:5
   |
- 12 |     Intern::intern_sized(v)
-    |     ^^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
-    |
-    = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
+  12 |     Intern::intern_sized(v)
+     |     ^^^^^^^^^^^^^^^^^^^^^^^ `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>` cannot be sent between threads safely
+     |
+     = help: within `fayalite::prelude::SimValue<()>`, the trait `Send` is not implemented for `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'static)>`
 note: required because it appears within the type `DynSimOnlyValue`
-   --> src/sim/value/sim_only_value_unsafe.rs
-    |
-    | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
-    |            ^^^^^^^^^^^^^^^
+    --> src/sim/value/sim_only_value_unsafe.rs
+     |
+ 271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
+     |            ^^^^^^^^^^^^^^^
 note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
-   --> $RUST/core/src/marker.rs
+    --> $RUST/core/src/marker.rs
+     |
+ 819 | pub struct PhantomData<T: PointeeSized>;
+     |            ^^^^^^^^^^^
 note: required because it appears within the type `alloc::raw_vec::RawVec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/raw_vec/mod.rs
+    --> $RUST/alloc/src/raw_vec/mod.rs
+     |
+  73 | pub(crate) struct RawVec<T, A: Allocator = Global> {
+     |                   ^^^^^^
 note: required because it appears within the type `Vec<DynSimOnlyValue>`
-   --> $RUST/alloc/src/vec/mod.rs
+    --> $RUST/alloc/src/vec/mod.rs
+     |
+ 438 | pub struct Vec<T, #[unstable(feature = "allocator_api", issue = "32838")] A: Allocator = Global> {
+     |            ^^^
 note: required because it appears within the type `OpaqueSimValue`
-   --> src/ty.rs
-    |
-    | pub struct OpaqueSimValue {
-    |            ^^^^^^^^^^^^^^
+    --> src/ty.rs
+     |
+ 761 | pub struct OpaqueSimValue {
+     |            ^^^^^^^^^^^^^^
 note: required because it appears within the type `value::SimValueInner<()>`
-   --> src/sim/value.rs
-    |
- 51 | struct SimValueInner<T: Type> {
-    |        ^^^^^^^^^^^^^
+    --> src/sim/value.rs
+     |
+  52 | struct SimValueInner<T: Type> {
+     |        ^^^^^^^^^^^^^
 note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
-   --> $RUST/core/src/cell.rs
+    --> $RUST/core/src/cell.rs
+     |
+     | pub struct UnsafeCell<T: ?Sized> {
+     |            ^^^^^^^^^^
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
-   --> src/util/alternating_cell.rs
-    |
- 22 | pub(crate) struct AlternatingCell<T: ?Sized> {
-    |                   ^^^^^^^^^^^^^^^
+    --> src/util/alternating_cell.rs
+     |
+  22 | pub(crate) struct AlternatingCell<T: ?Sized> {
+     |                   ^^^^^^^^^^^^^^^
 note: required because it appears within the type `fayalite::prelude::SimValue<()>`
-   --> src/sim/value.rs
-    |
-    | pub struct SimValue<T: Type> {
-    |            ^^^^^^^^
+    --> src/sim/value.rs
+     |
+ 161 | pub struct SimValue<T: Type> {
+     |            ^^^^^^^^
 note: required by a bound in `fayalite::intern::Interned`
-   --> src/intern.rs
-    |
-    | pub struct Interned<T: ?Sized + 'static + Send + Sync> {
-    |                                           ^^^^ required by this bound in `Interned`
+    --> src/intern.rs
+     |
+ 648 | pub struct Interned<T: ?Sized + 'static + Send + Sync> {
+     |                                           ^^^^ required by this bound in `Interned`

rocq-demo/.gitignore

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: LGPL-3.0-or-later
+# See Notices.txt for copyright information
+.CoqMakefile.d
+*.aux
+CoqMakefile
+CoqMakefile.conf
+*.glob
+*.vo*

rocq-demo/Makefile

@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: LGPL-3.0-or-later
+# See Notices.txt for copyright information
+#
+# Example Makefile wrapper as given on the Rocq documentation
+# https://rocq-prover.org/doc/V9.1.0/refman/practical-tools/utilities.html#building-a-rocq-project-with-rocq-makefile-details
+
+# KNOWNTARGETS will not be passed along to CoqMakefile
+KNOWNTARGETS := CoqMakefile
+# KNOWNFILES will not get implicit targets from the final rule, and so
+# depending on them won't invoke the submake
+# Warning: These files get declared as PHONY, so any targets depending
+# on them always get rebuilt
+KNOWNFILES   := Makefile _CoqProject
+
+.DEFAULT_GOAL := invoke-coq-makefile
+
+CoqMakefile: Makefile _CoqProject
+	$(COQBIN)rocq makefile -f _CoqProject -o CoqMakefile
+
+invoke-coq-makefile: CoqMakefile
+	$(MAKE) --no-print-directory -f CoqMakefile $(filter-out $(KNOWNTARGETS),$(MAKECMDGOALS))
+
+.PHONY: invoke-coq-makefile $(KNOWNFILES)
+
+####################################################################
+##                      Your targets here                         ##
+####################################################################
+
+# This should be the last rule, to handle any targets not declared above
+%: invoke-coq-makefile
+	@true

rocq-demo/_CoqProject

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: LGPL-3.0-or-later
+# See Notices.txt for copyright information
+
+-Q . RocqDemo
+.

scripts/check-copyright.sh

@@ -50,7 +50,7 @@ function main()
         /crates/fayalite/tests/ui/*.stderr|/crates/fayalite/tests/sim/expected/*.vcd|/crates/fayalite/tests/sim/expected/*.txt)
             # file that can't contain copyright header
             ;;
-        /.forgejo/workflows/*.yml|*/.gitignore|*.toml)
+        /.forgejo/workflows/*.yml|*/.gitignore|*.toml|*/Makefile|*/_CoqProject)
             check_file "$file" "${POUND_HEADER[@]}"
             ;;
         *.md)