.forgejo/workflows/test.yml

@@ -4,7 +4,6 @@ on: [push, pull_request]
 
 jobs:
   deps:
-    runs-on: debian-12
     uses: ./.forgejo/workflows/deps.yml
   test:
     runs-on: debian-12
@@ -39,7 +38,7 @@ jobs:
             z3 \
             zlib1g-dev
       - run: |
-          curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y --default-toolchain 1.89.0
+          curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y --default-toolchain 1.82.0
           source "$HOME/.cargo/env"
           echo "$PATH" >> "$GITHUB_PATH"
       - uses: https://git.libre-chip.org/mirrors/cache/restore@v3

Cargo.toml

@@ -7,11 +7,11 @@ members = ["crates/*"]
 [workspace.package]
 version = "0.3.0"
 license = "LGPL-3.0-or-later"
-edition = "2024"
+edition = "2021"
 repository = "https://git.libre-chip.org/libre-chip/fayalite"
 keywords = ["hdl", "hardware", "semiconductors", "firrtl", "fpga"]
 categories = ["simulation", "development-tools", "compilers"]
-rust-version = "1.89.0"
+rust-version = "1.82.0"
 
 [workspace.dependencies]
 fayalite-proc-macros = { version = "=0.3.0", path = "crates/fayalite-proc-macros" }

crates/fayalite-proc-macros-impl/src/hdl_bundle.rs

@@ -1,22 +1,21 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr, PairsIterExt,
     hdl_type_common::{
-        ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedField, ParsedFieldsNamed, ParsedGenerics,
+        common_derives, get_target, ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedField,
-        SplitForImpl, TypesParser, WrappedInConst, common_derives, get_target,
+        ParsedFieldsNamed, ParsedGenerics, SplitForImpl, TypesParser, WrappedInConst,
     },
-    kw,
+    kw, Errors, HdlAttr, PairsIterExt,
 };
 use proc_macro2::TokenStream;
-use quote::{ToTokens, format_ident, quote_spanned};
+use quote::{format_ident, quote_spanned, ToTokens};
 use syn::{
-    AngleBracketedGenericArguments, Attribute, Field, FieldMutability, Fields, FieldsNamed,
+    parse_quote, parse_quote_spanned,
-    GenericParam, Generics, Ident, ItemStruct, Path, Token, Type, Visibility, parse_quote,
-    parse_quote_spanned,
     punctuated::{Pair, Punctuated},
     spanned::Spanned,
     token::Brace,
+    AngleBracketedGenericArguments, Attribute, Field, FieldMutability, Fields, FieldsNamed,
+    GenericParam, Generics, Ident, ItemStruct, Path, Token, Type, Visibility,
 };
 
 #[derive(Clone, Debug)]

crates/fayalite-proc-macros-impl/src/hdl_enum.rs

@@ -1,20 +1,20 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr, PairsIterExt,
     hdl_type_common::{
-        ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics, ParsedType, SplitForImpl,
+        common_derives, get_target, ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics,
-        TypesParser, WrappedInConst, common_derives, get_target,
+        ParsedType, SplitForImpl, TypesParser, WrappedInConst,
     },
-    kw,
+    kw, Errors, HdlAttr, PairsIterExt,
 };
 use proc_macro2::TokenStream;
-use quote::{ToTokens, format_ident, quote_spanned};
+use quote::{format_ident, quote_spanned, ToTokens};
 use syn::{
-    Attribute, Field, FieldMutability, Fields, FieldsNamed, FieldsUnnamed, Generics, Ident,
+    parse_quote_spanned,
-    ItemEnum, ItemStruct, Token, Type, Variant, Visibility, parse_quote_spanned,
     punctuated::{Pair, Punctuated},
     token::{Brace, Paren},
+    Attribute, Field, FieldMutability, Fields, FieldsNamed, FieldsUnnamed, Generics, Ident,
+    ItemEnum, ItemStruct, Token, Type, Variant, Visibility,
 };
 
 crate::options! {

crates/fayalite-proc-macros-impl/src/hdl_type_alias.rs

@@ -1,16 +1,15 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr,
     hdl_type_common::{
-        ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics, ParsedType, TypesParser,
+        get_target, ItemOptions, MakeHdlTypeExpr, MaybeParsed, ParsedGenerics, ParsedType,
-        get_target,
+        TypesParser,
     },
-    kw,
+    kw, Errors, HdlAttr,
 };
 use proc_macro2::TokenStream;
 use quote::ToTokens;
-use syn::{Attribute, Generics, Ident, ItemType, Token, Type, Visibility, parse_quote_spanned};
+use syn::{parse_quote_spanned, Attribute, Generics, Ident, ItemType, Token, Type, Visibility};
 
 #[derive(Clone, Debug)]
 pub(crate) struct ParsedTypeAlias {

crates/fayalite-proc-macros-impl/src/hdl_type_common.rs

@@ -1,21 +1,21 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
-use crate::{Errors, HdlAttr, PairsIterExt, fold::impl_fold, kw};
+use crate::{fold::impl_fold, kw, Errors, HdlAttr, PairsIterExt};
 use proc_macro2::{Span, TokenStream};
-use quote::{ToTokens, format_ident, quote_spanned};
+use quote::{format_ident, quote_spanned, ToTokens};
 use std::{collections::HashMap, fmt, mem};
 use syn::{
+    parse::{Parse, ParseStream},
+    parse_quote, parse_quote_spanned,
+    punctuated::{Pair, Punctuated},
+    spanned::Spanned,
+    token::{Brace, Bracket, Paren},
     AngleBracketedGenericArguments, Attribute, Block, ConstParam, Expr, ExprBlock, ExprGroup,
     ExprIndex, ExprParen, ExprPath, ExprTuple, Field, FieldMutability, Fields, FieldsNamed,
     FieldsUnnamed, GenericArgument, GenericParam, Generics, Ident, ImplGenerics, Index, ItemStruct,
     Path, PathArguments, PathSegment, PredicateType, QSelf, Stmt, Token, Turbofish, Type,
     TypeGenerics, TypeGroup, TypeParam, TypeParen, TypePath, TypeTuple, Visibility, WhereClause,
     WherePredicate,
-    parse::{Parse, ParseStream},
-    parse_quote, parse_quote_spanned,
-    punctuated::{Pair, Punctuated},
-    spanned::Spanned,
-    token::{Brace, Bracket, Paren},
 };
 
 crate::options! {
@@ -299,7 +299,7 @@ impl ParseTypes<Expr> for ParsedExpr {
                 return Ok(ParsedExpr::Delimited(ParsedExprDelimited {
                     delim: ExprDelimiter::Group(*group_token),
                     expr: parser.parse(expr)?,
-                }));
+                }))
             }
             Expr::Paren(ExprParen {
                 attrs,
@@ -309,7 +309,7 @@ impl ParseTypes<Expr> for ParsedExpr {
                 return Ok(ParsedExpr::Delimited(ParsedExprDelimited {
                     delim: ExprDelimiter::Paren(*paren_token),
                     expr: parser.parse(expr)?,
-                }));
+                }))
             }
             Expr::Path(ExprPath {
                 attrs,
@@ -1902,8 +1902,8 @@ pub(crate) mod known_items {
     use proc_macro2::{Ident, Span, TokenStream};
     use quote::ToTokens;
     use syn::{
-        Path, PathArguments, PathSegment, Token,
         parse::{Parse, ParseStream},
+        Path, PathArguments, PathSegment, Token,
     };
 
     macro_rules! impl_known_item_body {
@@ -3761,10 +3761,7 @@ pub(crate) trait AsTurbofish {
 }
 
 impl AsTurbofish for TypeGenerics<'_> {
-    type Turbofish<'a>
+    type Turbofish<'a> = Turbofish<'a> where Self: 'a;
-        = Turbofish<'a>
-    where
-        Self: 'a;
 
     fn as_turbofish(&self) -> Self::Turbofish<'_> {
         TypeGenerics::as_turbofish(self)
@@ -3772,8 +3769,7 @@ impl AsTurbofish for TypeGenerics<'_> {
 }
 
 impl AsTurbofish for ParsedGenericsTypeGenerics<'_> {
-    type Turbofish<'a>
+    type Turbofish<'a> = ParsedGenericsTurbofish<'a>
-        = ParsedGenericsTurbofish<'a>
     where
         Self: 'a;
 
@@ -3824,18 +3820,15 @@ impl SplitForImpl for Generics {
 }
 
 impl SplitForImpl for ParsedGenerics {
-    type ImplGenerics<'a>
+    type ImplGenerics<'a> = ParsedGenericsImplGenerics<'a>
-        = ParsedGenericsImplGenerics<'a>
     where
         Self: 'a;
 
-    type TypeGenerics<'a>
+    type TypeGenerics<'a> = ParsedGenericsTypeGenerics<'a>
-        = ParsedGenericsTypeGenerics<'a>
     where
         Self: 'a;
 
-    type WhereClause<'a>
+    type WhereClause<'a> = ParsedGenericsWhereClause<'a>
-        = ParsedGenericsWhereClause<'a>
     where
         Self: 'a;
 
@@ -4052,8 +4045,7 @@ impl<P: ToTokens, U: ToTokens> ToTokens for MaybeParsed<P, U> {
 }
 
 impl<P: AsTurbofish, U: AsTurbofish> AsTurbofish for MaybeParsed<P, U> {
-    type Turbofish<'a>
+    type Turbofish<'a> = MaybeParsed<P::Turbofish<'a>, U::Turbofish<'a>>
-        = MaybeParsed<P::Turbofish<'a>, U::Turbofish<'a>>
     where
         Self: 'a;
 
@@ -4066,16 +4058,13 @@ impl<P: AsTurbofish, U: AsTurbofish> AsTurbofish for MaybeParsed<P, U> {
 }
 
 impl<P: SplitForImpl, U: SplitForImpl> SplitForImpl for MaybeParsed<P, U> {
-    type ImplGenerics<'a>
+    type ImplGenerics<'a> = MaybeParsed<P::ImplGenerics<'a>, U::ImplGenerics<'a>>
-        = MaybeParsed<P::ImplGenerics<'a>, U::ImplGenerics<'a>>
     where
         Self: 'a;
-    type TypeGenerics<'a>
+    type TypeGenerics<'a> = MaybeParsed<P::TypeGenerics<'a>, U::TypeGenerics<'a>>
-        = MaybeParsed<P::TypeGenerics<'a>, U::TypeGenerics<'a>>
     where
         Self: 'a;
-    type WhereClause<'a>
+    type WhereClause<'a> = MaybeParsed<P::WhereClause<'a>, U::WhereClause<'a>>
-        = MaybeParsed<P::WhereClause<'a>, U::WhereClause<'a>>
     where
         Self: 'a;
 

crates/fayalite-proc-macros-impl/src/lib.rs

@@ -2,13 +2,13 @@
 // See Notices.txt for copyright information
 #![cfg_attr(test, recursion_limit = "512")]
 use proc_macro2::{Span, TokenStream};
-use quote::{ToTokens, quote};
+use quote::{quote, ToTokens};
 use std::{
-    collections::{HashMap, hash_map::Entry},
+    collections::{hash_map::Entry, HashMap},
     io::{ErrorKind, Write},
 };
 use syn::{
-    AttrStyle, Attribute, Error, Ident, Item, ItemFn, LitBool, LitStr, Meta, Token, bracketed,
+    bracketed,
     ext::IdentExt,
     parenthesized,
     parse::{Parse, ParseStream, Parser},
@@ -16,6 +16,7 @@ use syn::{
     punctuated::{Pair, Punctuated},
     spanned::Spanned,
     token::{Bracket, Paren},
+    AttrStyle, Attribute, Error, Ident, Item, ItemFn, LitBool, LitStr, Meta, Token,
 };
 
 mod fold;

crates/fayalite-proc-macros-impl/src/module.rs

@@ -1,20 +1,19 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr, PairsIterExt,
     hdl_type_common::{ParsedGenerics, SplitForImpl},
     kw,
     module::transform_body::{HdlLet, HdlLetKindIO},
-    options,
+    options, Errors, HdlAttr, PairsIterExt,
 };
 use proc_macro2::TokenStream;
-use quote::{ToTokens, format_ident, quote, quote_spanned};
+use quote::{format_ident, quote, quote_spanned, ToTokens};
 use std::collections::HashSet;
 use syn::{
+    parse_quote,
+    visit::{visit_pat, Visit},
     Attribute, Block, ConstParam, Error, FnArg, GenericParam, Generics, Ident, ItemFn, ItemStruct,
     LifetimeParam, ReturnType, Signature, TypeParam, Visibility, WhereClause, WherePredicate,
-    parse_quote,
-    visit::{Visit, visit_pat},
 };
 
 mod transform_body;

crates/fayalite-proc-macros-impl/src/module/transform_body.rs

@@ -1,28 +1,27 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr,
+    fold::{impl_fold, DoFold},
-    fold::{DoFold, impl_fold},
     hdl_type_common::{
-        ParseFailed, ParseTypes, ParsedGenerics, ParsedType, TypesParser, known_items,
+        known_items, ParseFailed, ParseTypes, ParsedGenerics, ParsedType, TypesParser,
     },
     is_hdl_attr, kw,
-    module::{ModuleIO, ModuleIOKind, ModuleKind, check_name_conflicts_with_module_builder},
+    module::{check_name_conflicts_with_module_builder, ModuleIO, ModuleIOKind, ModuleKind},
-    options,
+    options, Errors, HdlAttr,
 };
 use num_bigint::BigInt;
 use proc_macro2::{Span, TokenStream};
-use quote::{ToTokens, quote, quote_spanned};
+use quote::{quote, quote_spanned, ToTokens};
 use std::{borrow::Borrow, convert::Infallible};
 use syn::{
-    Attribute, Block, Error, Expr, ExprIf, ExprLet, ExprLit, ExprRepeat, ExprUnary,
+    fold::{fold_expr, fold_expr_lit, fold_expr_unary, fold_local, fold_stmt, Fold},
-    GenericArgument, Ident, Item, Lit, LitStr, Local, LocalInit, Pat, Token, Type, UnOp,
-    fold::{Fold, fold_expr, fold_expr_lit, fold_expr_unary, fold_local, fold_stmt},
     parenthesized,
     parse::{Parse, ParseStream},
     parse_quote, parse_quote_spanned,
     spanned::Spanned,
     token::Paren,
+    Attribute, Block, Error, Expr, ExprIf, ExprLet, ExprLit, ExprRepeat, ExprUnary,
+    GenericArgument, Ident, Item, Lit, LitStr, Local, LocalInit, Pat, Token, Type, UnOp,
 };
 
 mod expand_aggregate_literals;

crates/fayalite-proc-macros-impl/src/module/transform_body/expand_aggregate_literals.rs

@@ -2,18 +2,19 @@
 // See Notices.txt for copyright information
 
 use crate::{
-    HdlAttr, kw,
+    kw,
     module::transform_body::{
+        expand_match::{parse_enum_path, EnumPath},
         ExprOptions, Visitor,
-        expand_match::{EnumPath, parse_enum_path},
     },
+    HdlAttr,
 };
 use quote::{format_ident, quote_spanned};
 use std::mem;
 use syn::{
-    Expr, ExprArray, ExprCall, ExprGroup, ExprMethodCall, ExprParen, ExprPath, ExprRepeat,
+    parse_quote_spanned, punctuated::Punctuated, spanned::Spanned, token::Paren, Expr, ExprArray,
-    ExprStruct, ExprTuple, FieldValue, Token, TypePath, parse_quote_spanned,
+    ExprCall, ExprGroup, ExprMethodCall, ExprParen, ExprPath, ExprRepeat, ExprStruct, ExprTuple,
-    punctuated::Punctuated, spanned::Spanned, token::Paren,
+    FieldValue, Token, TypePath,
 };
 
 impl Visitor<'_> {

crates/fayalite-proc-macros-impl/src/module/transform_body/expand_match.rs

@@ -1,25 +1,25 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use crate::{
-    Errors, HdlAttr, PairsIterExt,
+    fold::{impl_fold, DoFold},
-    fold::{DoFold, impl_fold},
     kw,
     module::transform_body::{
-        ExprOptions, Visitor, empty_let, with_debug_clone_and_fold, wrap_ty_with_expr,
+        empty_let, with_debug_clone_and_fold, wrap_ty_with_expr, ExprOptions, Visitor,
     },
+    Errors, HdlAttr, PairsIterExt,
 };
 use proc_macro2::{Span, TokenStream};
-use quote::{ToTokens, TokenStreamExt, format_ident, quote_spanned};
+use quote::{format_ident, quote_spanned, ToTokens, TokenStreamExt};
 use std::collections::BTreeSet;
 use syn::{
-    Arm, Attribute, Expr, ExprMatch, FieldPat, Ident, Local, Member, Pat, PatIdent, PatOr,
+    fold::{fold_arm, fold_expr_match, fold_local, fold_pat, Fold},
-    PatParen, PatPath, PatRest, PatStruct, PatTuple, PatTupleStruct, PatWild, Path, PathSegment,
-    Token, TypePath,
-    fold::{Fold, fold_arm, fold_expr_match, fold_local, fold_pat},
     parse_quote_spanned,
     punctuated::Punctuated,
     spanned::Spanned,
     token::{Brace, Paren},
+    Arm, Attribute, Expr, ExprMatch, FieldPat, Ident, Local, Member, Pat, PatIdent, PatOr,
+    PatParen, PatPath, PatRest, PatStruct, PatTuple, PatTupleStruct, PatWild, Path, PathSegment,
+    Token, TypePath,
 };
 
 macro_rules! visit_trait {

crates/fayalite-proc-macros-impl/src/process_cfg.rs

@@ -5,8 +5,8 @@ use crate::{Cfg, CfgAttr, Cfgs, Errors};
 use proc_macro2::Ident;
 use std::{collections::VecDeque, marker::PhantomData};
 use syn::{
-    Token,
     punctuated::{Pair, Punctuated},
+    Token,
 };
 
 struct State<P: Phase> {

crates/fayalite-visit-gen/src/lib.rs

@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use proc_macro2::{Span, TokenStream};
-use quote::{ToTokens, format_ident, quote};
+use quote::{format_ident, quote, ToTokens};
 use std::{collections::BTreeMap, fs};
 use syn::{fold::Fold, parse_quote};
 

crates/fayalite/src/annotations.rs

@@ -314,7 +314,9 @@ impl<T: Iterator<Item: IntoAnnotations>> Iterator for IterIntoAnnotations<T> {
 }
 
 impl<
-    T: FusedIterator<Item: IntoAnnotations<IntoAnnotations: IntoIterator<IntoIter: FusedIterator>>>,
+        T: FusedIterator<
+            Item: IntoAnnotations<IntoAnnotations: IntoIterator<IntoIter: FusedIterator>>,
+        >,
     > FusedIterator for IterIntoAnnotations<T>
 {
 }

crates/fayalite/src/array.rs

@@ -3,22 +3,22 @@
 
 use crate::{
     expr::{
-        CastToBits, Expr, HdlPartialEq, ReduceBits, ToExpr,
         ops::{ArrayLiteral, ExprFromIterator, ExprIntoIterator, ExprPartialEq},
+        CastToBits, Expr, HdlPartialEq, ReduceBits, ToExpr,
     },
-    int::{Bool, DYN_SIZE, DynSize, KnownSize, Size, SizeType},
+    int::{Bool, DynSize, KnownSize, Size, SizeType, DYN_SIZE},
     intern::{Intern, Interned, LazyInterned},
     module::transform::visit::{Fold, Folder, Visit, Visitor},
     sim::value::{SimValue, SimValuePartialEq},
     source_location::SourceLocation,
     ty::{
-        CanonicalType, MatchVariantWithoutScope, StaticType, Type, TypeProperties, TypeWithDeref,
+        serde_impls::SerdeCanonicalType, CanonicalType, MatchVariantWithoutScope, StaticType, Type,
-        serde_impls::SerdeCanonicalType,
+        TypeProperties, TypeWithDeref,
     },
     util::ConstUsize,
 };
 use bitvec::slice::BitSlice;
-use serde::{Deserialize, Deserializer, Serialize, Serializer, de::Error};
+use serde::{de::Error, Deserialize, Deserializer, Serialize, Serializer};
 use std::{iter::FusedIterator, ops::Index};
 
 #[derive(Copy, Clone, PartialEq, Eq, Hash)]

crates/fayalite/src/bundle.rs

@@ -3,16 +3,16 @@
 
 use crate::{
     expr::{
-        CastToBits, Expr, ReduceBits, ToExpr,
         ops::{ArrayLiteral, BundleLiteral, ExprPartialEq},
+        CastToBits, Expr, ReduceBits, ToExpr,
     },
     int::{Bool, DynSize},
     intern::{Intern, Interned},
     sim::value::{SimValue, SimValuePartialEq, ToSimValue, ToSimValueWithType},
     source_location::SourceLocation,
     ty::{
-        CanonicalType, MatchVariantWithoutScope, OpaqueSimValue, StaticType, Type, TypeProperties,
+        impl_match_variant_as_self, CanonicalType, MatchVariantWithoutScope, OpaqueSimValue,
-        TypeWithDeref, impl_match_variant_as_self,
+        StaticType, Type, TypeProperties, TypeWithDeref,
     },
     util::HashMap,
 };

crates/fayalite/src/cli.rs

@@ -8,10 +8,10 @@ use crate::{
     util::{job_server::AcquiredJob, streaming_read_utf8::streaming_read_utf8},
 };
 use clap::{
-    Parser, Subcommand, ValueEnum, ValueHint,
     builder::{OsStringValueParser, TypedValueParser},
+    Parser, Subcommand, ValueEnum, ValueHint,
 };
-use eyre::{Report, eyre};
+use eyre::{eyre, Report};
 use serde::{Deserialize, Serialize};
 use std::{
     error,
@@ -301,9 +301,7 @@ impl VerilogArgs {
                 input.split_once(file_separator_prefix)
             {
                 let Some((next_file_name, rest)) = rest.split_once(file_separator_suffix) else {
-                    return Err(CliError(eyre!(
+                    return Err(CliError(eyre!("parsing firtool's output failed: found {file_separator_prefix:?} but no {file_separator_suffix:?}")));
-                        "parsing firtool's output failed: found {file_separator_prefix:?} but no {file_separator_suffix:?}"
-                    )));
                 };
                 input = rest;
                 (chunk, Some(next_file_name.as_ref()))

crates/fayalite/src/clock.rs

@@ -6,7 +6,7 @@ use crate::{
     int::Bool,
     reset::{Reset, ResetType},
     source_location::SourceLocation,
-    ty::{CanonicalType, StaticType, Type, TypeProperties, impl_match_variant_as_self},
+    ty::{impl_match_variant_as_self, CanonicalType, StaticType, Type, TypeProperties},
 };
 use bitvec::slice::BitSlice;
 

crates/fayalite/src/enum_.rs

@@ -3,15 +3,15 @@
 
 use crate::{
     expr::{
-        Expr, ToExpr,
         ops::{ExprPartialEq, VariantAccess},
+        Expr, ToExpr,
     },
     hdl,
     int::{Bool, UIntValue},
     intern::{Intern, Interned},
     module::{
-        EnumMatchVariantAndInactiveScopeImpl, EnumMatchVariantsIterImpl, Scope, connect,
+        connect, enum_match_variants_helper, incomplete_wire, wire,
-        enum_match_variants_helper, incomplete_wire, wire,
+        EnumMatchVariantAndInactiveScopeImpl, EnumMatchVariantsIterImpl, Scope,
     },
     sim::value::{SimValue, SimValuePartialEq},
     source_location::SourceLocation,

crates/fayalite/src/expr.rs

@@ -13,8 +13,8 @@ use crate::{
     intern::{Intern, Interned},
     memory::{DynPortType, MemPort, PortType},
     module::{
-        Instance, ModuleIO,
         transform::visit::{Fold, Folder, Visit, Visitor},
+        Instance, ModuleIO,
     },
     phantom_const::PhantomConst,
     reg::Reg,
@@ -283,10 +283,7 @@ impl<T: Type + fmt::Debug> fmt::Debug for Expr<T> {
             } = self;
             let expr_ty = __ty.canonical();
             let enum_ty = __enum.to_expr().__ty;
-            assert_eq!(
+            assert_eq!(expr_ty, enum_ty, "expr ty mismatch:\nExpr {{\n__enum: {__enum:?},\n__ty: {__ty:?},\n__flow: {__flow:?}\n}}");
-                expr_ty, enum_ty,
-                "expr ty mismatch:\nExpr {{\n__enum: {__enum:?},\n__ty: {__ty:?},\n__flow: {__flow:?}\n}}"
-            );
         }
         self.__enum.fmt(f)
     }
@@ -532,7 +529,11 @@ impl Flow {
         }
     }
     pub const fn flip_if(self, flipped: bool) -> Flow {
-        if flipped { self.flip() } else { self }
+        if flipped {
+            self.flip()
+        } else {
+            self
+        }
     }
 }
 

crates/fayalite/src/expr/ops.rs

@@ -7,12 +7,12 @@ use crate::{
     clock::{Clock, ToClock},
     enum_::{Enum, EnumType, EnumVariant},
     expr::{
-        CastBitsTo as _, CastTo, CastToBits as _, Expr, ExprEnum, Flow, HdlPartialEq,
-        HdlPartialOrd, NotALiteralExpr, ReduceBits, ToExpr, ToLiteralBits,
         target::{
             GetTarget, Target, TargetPathArrayElement, TargetPathBundleField,
             TargetPathDynArrayElement, TargetPathElement,
         },
+        CastBitsTo as _, CastTo, CastToBits as _, Expr, ExprEnum, Flow, HdlPartialEq,
+        HdlPartialOrd, NotALiteralExpr, ReduceBits, ToExpr, ToLiteralBits,
     },
     int::{
         Bool, BoolOrIntType, DynSize, IntType, KnownSize, SInt, SIntType, SIntValue, Size, UInt,

crates/fayalite/src/firrtl.rs

@@ -11,32 +11,32 @@ use crate::{
     clock::Clock,
     enum_::{Enum, EnumType, EnumVariant},
     expr::{
-        CastBitsTo, Expr, ExprEnum,
         ops::{self, VariantAccess},
         target::{
             Target, TargetBase, TargetPathArrayElement, TargetPathBundleField, TargetPathElement,
         },
+        CastBitsTo, Expr, ExprEnum,
     },
     formal::FormalKind,
     int::{Bool, DynSize, IntType, SIntValue, UInt, UIntValue},
     intern::{Intern, Interned},
     memory::{Mem, PortKind, PortName, ReadUnderWrite},
     module::{
+        transform::{
+            simplify_enums::{simplify_enums, SimplifyEnumsError, SimplifyEnumsKind},
+            simplify_memories::simplify_memories,
+        },
         AnnotatedModuleIO, Block, ExternModuleBody, ExternModuleParameter,
         ExternModuleParameterValue, Module, ModuleBody, NameOptId, NormalModuleBody, Stmt,
         StmtConnect, StmtDeclaration, StmtFormal, StmtIf, StmtInstance, StmtMatch, StmtReg,
         StmtWire,
-        transform::{
-            simplify_enums::{SimplifyEnumsError, SimplifyEnumsKind, simplify_enums},
-            simplify_memories::simplify_memories,
-        },
     },
     reset::{AsyncReset, Reset, ResetType, SyncReset},
     source_location::SourceLocation,
     ty::{CanonicalType, Type},
     util::{
-        BitSliceWriteWithBase, DebugAsRawString, GenericConstBool, HashMap, HashSet,
+        const_str_array_is_strictly_ascending, BitSliceWriteWithBase, DebugAsRawString,
-        const_str_array_is_strictly_ascending,
+        GenericConstBool, HashMap, HashSet,
     },
 };
 use bitvec::slice::BitSlice;
@@ -925,10 +925,7 @@ impl<'a> Exporter<'a> {
             },
         ) in expr.field_values().into_iter().zip(ty.fields())
         {
-            debug_assert!(
+            debug_assert!(!flipped, "can't have bundle literal with flipped field -- this should have been caught in BundleLiteral::new_unchecked");
-                !flipped,
-                "can't have bundle literal with flipped field -- this should have been caught in BundleLiteral::new_unchecked"
-            );
             let name = bundle_ns.borrow_mut().get(name);
             let field_value = self.expr(Expr::canonical(field_value), definitions, const_ty);
             definitions.add_definition_line(format_args!("connect {ident}.{name}, {field_value}"));
@@ -1264,9 +1261,7 @@ impl<'a> Exporter<'a> {
             "UInt<0>(0)".into()
         };
         for (variant_index, variant) in ty.variants().into_iter().enumerate() {
-            let when_cond = format!(
+            let when_cond = format!("eq(UInt<{discriminant_bit_width}>({variant_index}), tail({value_str}, {body_bit_width}))");
-                "eq(UInt<{discriminant_bit_width}>({variant_index}), tail({value_str}, {body_bit_width}))"
-            );
             if variant_index == ty.variants().len() - 1 {
                 definitions.add_definition_line(format_args!("{extra_indent}else:"));
             } else if variant_index == 0 {

crates/fayalite/src/int.rs

@@ -4,22 +4,22 @@
 use crate::{
     array::ArrayType,
     expr::{
-        Expr, NotALiteralExpr, ToExpr, ToLiteralBits,
         target::{GetTarget, Target},
+        Expr, NotALiteralExpr, ToExpr, ToLiteralBits,
     },
     hdl,
     intern::{Intern, Interned, Memoize},
     sim::value::{SimValue, ToSimValueWithType},
     source_location::SourceLocation,
-    ty::{CanonicalType, StaticType, Type, TypeProperties, impl_match_variant_as_self},
+    ty::{impl_match_variant_as_self, CanonicalType, StaticType, Type, TypeProperties},
-    util::{ConstBool, ConstUsize, GenericConstBool, GenericConstUsize, interned_bit},
+    util::{interned_bit, ConstBool, ConstUsize, GenericConstBool, GenericConstUsize},
 };
 use bitvec::{order::Lsb0, slice::BitSlice, vec::BitVec, view::BitView};
 use num_bigint::{BigInt, BigUint, Sign};
 use num_traits::{One, Signed, Zero};
 use serde::{
-    Deserialize, Deserializer, Serialize, Serializer,
     de::{DeserializeOwned, Error, Visitor},
+    Deserialize, Deserializer, Serialize, Serializer,
 };
 use std::{
     borrow::{BorrowMut, Cow},
@@ -224,7 +224,11 @@ impl<T: KnownSize> Size for T {
     }
 
     fn try_from_usize(v: usize) -> Option<Self::SizeType> {
-        if v == T::VALUE { Some(T::SIZE) } else { None }
+        if v == T::VALUE {
+            Some(T::SIZE)
+        } else {
+            None
+        }
     }
 }
 

crates/fayalite/src/int/uint_in_range.rs

@@ -4,20 +4,20 @@
 use crate::{
     bundle::{Bundle, BundleField, BundleType, BundleTypePropertiesBuilder, NoBuilder},
     expr::{
-        CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd,
         ops::{ExprCastTo, ExprPartialEq, ExprPartialOrd},
+        CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd,
     },
     int::{Bool, DynSize, KnownSize, Size, SizeType, UInt, UIntType},
     intern::{Intern, Interned},
     phantom_const::PhantomConst,
     sim::value::{SimValue, SimValuePartialEq, ToSimValueWithType},
     source_location::SourceLocation,
-    ty::{CanonicalType, StaticType, Type, TypeProperties, impl_match_variant_as_self},
+    ty::{impl_match_variant_as_self, CanonicalType, StaticType, Type, TypeProperties},
 };
 use bitvec::{order::Lsb0, slice::BitSlice, view::BitView};
 use serde::{
+    de::{value::UsizeDeserializer, Error, Visitor},
     Deserialize, Deserializer, Serialize, Serializer,
-    de::{Error, Visitor, value::UsizeDeserializer},
 };
 use std::{fmt, marker::PhantomData, ops::Index};
 
@@ -45,18 +45,15 @@ impl Type for UIntInRangeMaskType {
 
     fn from_canonical(canonical_type: CanonicalType) -> Self {
         let fields = Bundle::from_canonical(canonical_type).fields();
-        let [
+        let [BundleField {
-            BundleField {
             name: value_name,
             flipped: false,
             ty: value,
-            },
+        }, BundleField {
-            BundleField {
             name: range_name,
             flipped: false,
             ty: range,
-            },
+        }] = *fields
-        ] = *fields
         else {
             panic!("expected UIntInRangeMaskType");
         };
@@ -326,18 +323,15 @@ macro_rules! define_uint_in_range_type {
 
             fn from_canonical(canonical_type: CanonicalType) -> Self {
                 let fields = Bundle::from_canonical(canonical_type).fields();
-                let [
+                let [BundleField {
-                    BundleField {
                     name: value_name,
                     flipped: false,
                     ty: value,
-                    },
+                }, BundleField {
-                    BundleField {
                     name: range_name,
                     flipped: false,
                     ty: range,
-                    },
+                }] = *fields
-                ] = *fields
                 else {
                     panic!("expected {}", stringify!($UIntInRange));
                 };

crates/fayalite/src/memory.rs

@@ -7,7 +7,7 @@ use crate::{
     array::{Array, ArrayType},
     bundle::{Bundle, BundleType},
     clock::Clock,
-    expr::{Expr, Flow, ToExpr, ToLiteralBits, ops::BundleLiteral, repeat},
+    expr::{ops::BundleLiteral, repeat, Expr, Flow, ToExpr, ToLiteralBits},
     hdl,
     int::{Bool, DynSize, Size, UInt, UIntType},
     intern::{Intern, Interned},

crates/fayalite/src/module.rs

@@ -8,12 +8,12 @@ use crate::{
     clock::{Clock, ClockDomain},
     enum_::{Enum, EnumMatchVariantsIter, EnumType},
     expr::{
-        Expr, Flow, ToExpr,
         ops::VariantAccess,
         target::{
             GetTarget, Target, TargetBase, TargetPathArrayElement, TargetPathBundleField,
             TargetPathElement,
         },
+        Expr, Flow, ToExpr,
     },
     formal::FormalKind,
     int::{Bool, DynSize, Size},
@@ -1459,9 +1459,7 @@ impl TargetState {
                     })
                     .reduce(TargetWritten::conditional_merge_written)
                 else {
-                    unreachable!(
+                    unreachable!("merge_conditional_sub_blocks_into_block must be called with at least one sub-block");
-                        "merge_conditional_sub_blocks_into_block must be called with at least one sub-block"
-                    );
                 };
                 let mut written_in_blocks = written_in_blocks.borrow_mut();
                 if target_block >= written_in_blocks.len() {
@@ -2292,12 +2290,14 @@ pub fn annotate<T: Type>(target: Expr<T>, annotations: impl IntoAnnotations) {
         }
         TargetBase::MemPort(v) => {
             ModuleBuilder::with(|m| {
-                RefCell::borrow_mut(unwrap!(
+                RefCell::borrow_mut(unwrap!(unwrap!(m
-                    unwrap!(m.impl_.borrow_mut().body.builder_normal_body_opt())
+                    .impl_
+                    .borrow_mut()
+                    .body
+                    .builder_normal_body_opt())
                 .body
                 .memory_map
-                        .get_mut(&v.mem_name())
+                .get_mut(&v.mem_name())))
-                ))
                 .port_annotations
                 .extend(annotations)
             });

crates/fayalite/src/module/transform/deduce_resets.rs

@@ -6,12 +6,12 @@ use crate::{
     bundle::{BundleField, BundleType},
     enum_::{EnumType, EnumVariant},
     expr::{
-        ExprEnum,
         ops::{self, ArrayLiteral},
         target::{
             Target, TargetBase, TargetChild, TargetPathArrayElement, TargetPathBundleField,
             TargetPathDynArrayElement, TargetPathElement,
         },
+        ExprEnum,
     },
     formal::FormalKind,
     int::{SIntValue, UIntValue},
@@ -41,16 +41,10 @@ impl fmt::Display for DeduceResetsError {
     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
         match self {
             DeduceResetsError::ResetIsNotDrivenByAsyncOrSync { source_location } => {
-                write!(
+                write!(f, "deduce_reset failed: Reset signal is not driven by any AsyncReset or SyncReset signals: {source_location}")
-                    f,
-                    "deduce_reset failed: Reset signal is not driven by any AsyncReset or SyncReset signals: {source_location}"
-                )
             }
             DeduceResetsError::ResetIsDrivenByBothAsyncAndSync { source_location } => {
-                write!(
+                write!(f, "deduce_reset failed: Reset signal is driven by both AsyncReset and SyncReset signals: {source_location}")
-                    f,
-                    "deduce_reset failed: Reset signal is driven by both AsyncReset and SyncReset signals: {source_location}"
-                )
             }
         }
     }
@@ -2105,7 +2099,7 @@ impl<P: Pass> RunPass<P> for StmtDeclaration {
     ) -> Result<PassOutput<Self, P>, DeduceResetsError> {
         let (annotations, reg) = match self {
             StmtDeclaration::Wire(v) => {
-                return Ok(v.run_pass(pass_args)?.map(StmtDeclaration::Wire));
+                return Ok(v.run_pass(pass_args)?.map(StmtDeclaration::Wire))
             }
             &StmtDeclaration::Reg(StmtReg { annotations, reg }) => (annotations, AnyReg::from(reg)),
             &StmtDeclaration::RegSync(StmtReg { annotations, reg }) => {
@@ -2115,7 +2109,7 @@ impl<P: Pass> RunPass<P> for StmtDeclaration {
                 (annotations, AnyReg::from(reg))
             }
             StmtDeclaration::Instance(v) => {
-                return Ok(v.run_pass(pass_args)?.map(StmtDeclaration::Instance));
+                return Ok(v.run_pass(pass_args)?.map(StmtDeclaration::Instance))
             }
         };
         let annotations = annotations.run_pass(pass_args.as_mut())?;

crates/fayalite/src/module/transform/simplify_enums.rs

@@ -5,16 +5,16 @@ use crate::{
     bundle::{Bundle, BundleField, BundleType},
     enum_::{Enum, EnumType, EnumVariant},
     expr::{
-        CastBitsTo, CastTo, CastToBits, Expr, ExprEnum, HdlPartialEq, ToExpr,
         ops::{self, EnumLiteral},
+        CastBitsTo, CastTo, CastToBits, Expr, ExprEnum, HdlPartialEq, ToExpr,
     },
     hdl,
     int::UInt,
     intern::{Intern, Interned, Memoize},
     memory::{DynPortType, Mem, MemPort},
     module::{
-        Block, Id, Module, NameId, ScopedNameId, Stmt, StmtConnect, StmtIf, StmtMatch, StmtWire,
         transform::visit::{Fold, Folder},
+        Block, Id, Module, NameId, ScopedNameId, Stmt, StmtConnect, StmtIf, StmtMatch, StmtWire,
     },
     source_location::SourceLocation,
     ty::{CanonicalType, Type},

crates/fayalite/src/module/transform/simplify_memories.rs

@@ -9,8 +9,8 @@ use crate::{
     intern::{Intern, Interned},
     memory::{Mem, MemPort, PortType},
     module::{
-        Block, Id, Module, NameId, ScopedNameId, Stmt, StmtConnect, StmtWire,
         transform::visit::{Fold, Folder},
+        Block, Id, Module, NameId, ScopedNameId, Stmt, StmtConnect, StmtWire,
     },
     source_location::SourceLocation,
     ty::{CanonicalType, Type},

crates/fayalite/src/module/transform/visit.rs

@@ -11,11 +11,12 @@ use crate::{
     clock::Clock,
     enum_::{Enum, EnumType, EnumVariant},
     expr::{
-        Expr, ExprEnum, ops,
+        ops,
         target::{
             Target, TargetBase, TargetChild, TargetPathArrayElement, TargetPathBundleField,
             TargetPathDynArrayElement, TargetPathElement,
         },
+        Expr, ExprEnum,
     },
     formal::FormalKind,
     int::{Bool, SIntType, SIntValue, Size, UIntType, UIntValue},

crates/fayalite/src/phantom_const.rs

@@ -3,22 +3,23 @@
 
 use crate::{
     expr::{
-        Expr, ToExpr,
         ops::{ExprPartialEq, ExprPartialOrd},
+        Expr, ToExpr,
     },
     int::Bool,
     intern::{Intern, Interned, InternedCompare, LazyInterned, LazyInternedTrait, Memoize},
     sim::value::{SimValue, SimValuePartialEq, ToSimValue, ToSimValueWithType},
     source_location::SourceLocation,
     ty::{
-        CanonicalType, StaticType, Type, TypeProperties, impl_match_variant_as_self,
+        impl_match_variant_as_self,
         serde_impls::{SerdeCanonicalType, SerdePhantomConst},
+        CanonicalType, StaticType, Type, TypeProperties,
     },
 };
 use bitvec::slice::BitSlice;
 use serde::{
-    Deserialize, Deserializer, Serialize, Serializer,
     de::{DeserializeOwned, Error},
+    Deserialize, Deserializer, Serialize, Serializer,
 };
 use std::{
     any::Any,

crates/fayalite/src/prelude.rs

@@ -1,7 +1,6 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 pub use crate::{
-    __,
     annotations::{
         BlackBoxInlineAnnotation, BlackBoxPathAnnotation, CustomFirrtlAnnotation,
         DocStringAnnotation, DontTouchAnnotation, SVAttributeAnnotation,
@@ -12,32 +11,33 @@ pub use crate::{
     clock::{Clock, ClockDomain, ToClock},
     enum_::{Enum, HdlNone, HdlOption, HdlSome},
     expr::{
-        CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd, MakeUninitExpr,
+        repeat, CastBitsTo, CastTo, CastToBits, Expr, HdlPartialEq, HdlPartialOrd, MakeUninitExpr,
-        ReduceBits, ToExpr, repeat,
+        ReduceBits, ToExpr,
     },
     formal::{
-        MakeFormalExpr, all_const, all_seq, any_const, any_seq, formal_global_clock, formal_reset,
+        all_const, all_seq, any_const, any_seq, formal_global_clock, formal_reset, hdl_assert,
-        hdl_assert, hdl_assert_with_enable, hdl_assume, hdl_assume_with_enable, hdl_cover,
+        hdl_assert_with_enable, hdl_assume, hdl_assume_with_enable, hdl_cover,
-        hdl_cover_with_enable,
+        hdl_cover_with_enable, MakeFormalExpr,
     },
     hdl, hdl_module,
     int::{Bool, DynSize, KnownSize, SInt, SIntType, SIntValue, Size, UInt, UIntType, UIntValue},
     memory::{Mem, MemBuilder, ReadUnderWrite},
     module::{
-        Instance, Module, ModuleBuilder, annotate, connect, connect_any, incomplete_wire, instance,
+        annotate, connect, connect_any, incomplete_wire, instance, memory, memory_array,
-        memory, memory_array, memory_with_init, reg_builder, wire,
+        memory_with_init, reg_builder, wire, Instance, Module, ModuleBuilder,
     },
     phantom_const::PhantomConst,
     reg::Reg,
     reset::{AsyncReset, Reset, SyncReset, ToAsyncReset, ToReset, ToSyncReset},
     sim::{
-        ExternModuleSimulationState, Simulation,
         time::{SimDuration, SimInstant},
         value::{SimValue, ToSimValue, ToSimValueWithType},
+        ExternModuleSimulationState, Simulation,
     },
     source_location::SourceLocation,
     ty::{AsMask, CanonicalType, Type},
     util::{ConstUsize, GenericConstUsize},
     wire::Wire,
+    __,
 };
 pub use bitvec::{slice::BitSlice, vec::BitVec};

crates/fayalite/src/reset.rs

@@ -2,10 +2,10 @@
 // See Notices.txt for copyright information
 use crate::{
     clock::Clock,
-    expr::{Expr, ToExpr, ops},
+    expr::{ops, Expr, ToExpr},
     int::{Bool, SInt, UInt},
     source_location::SourceLocation,
-    ty::{CanonicalType, StaticType, Type, TypeProperties, impl_match_variant_as_self},
+    ty::{impl_match_variant_as_self, CanonicalType, StaticType, Type, TypeProperties},
 };
 use bitvec::slice::BitSlice;
 

crates/fayalite/src/sim.rs

@@ -7,11 +7,12 @@ use crate::{
     bundle::{BundleField, BundleType},
     enum_::{EnumType, EnumVariant},
     expr::{
-        ExprEnum, Flow, ToLiteralBits, ops,
+        ops,
         target::{
             GetTarget, Target, TargetBase, TargetPathArrayElement, TargetPathBundleField,
             TargetPathElement,
         },
+        ExprEnum, Flow, ToLiteralBits,
     },
     int::{BoolOrIntType, UIntValue},
     intern::{
@@ -19,10 +20,10 @@ use crate::{
     },
     memory::PortKind,
     module::{
-        AnnotatedModuleIO, Block, ExternModuleBody, Id, InstantiatedModule, ModuleBody, NameId,
+        transform::deduce_resets::deduce_resets, AnnotatedModuleIO, Block, ExternModuleBody, Id,
-        NormalModuleBody, ScopedNameId, Stmt, StmtConnect, StmtDeclaration, StmtFormal, StmtIf,
+        InstantiatedModule, ModuleBody, NameId, NormalModuleBody, ScopedNameId, Stmt, StmtConnect,
-        StmtInstance, StmtMatch, StmtReg, StmtWire, TargetInInstantiatedModule,
+        StmtDeclaration, StmtFormal, StmtIf, StmtInstance, StmtMatch, StmtReg, StmtWire,
-        transform::deduce_resets::deduce_resets,
+        TargetInInstantiatedModule,
     },
     prelude::*,
     reset::{ResetType, ResetTypeDispatch},
@@ -64,7 +65,6 @@ use std::{
     mem,
     ops::IndexMut,
     pin::Pin,
-    ptr,
     rc::Rc,
     sync::Arc,
     task::Poll,
@@ -6727,10 +6727,7 @@ impl SimulationImpl {
                 let this = &mut *self;
                 let mut sim = this.sim.borrow_mut();
                 let sim = &mut *sim;
-                assert!(
+                assert!(cx.waker().will_wake(&sim.generator_waker), "can't use ExternModuleSimulationState's methods outside of ExternModuleSimulation");
-                    cx.waker().will_wake(&sim.generator_waker),
-                    "can't use ExternModuleSimulationState's methods outside of ExternModuleSimulation"
-                );
                 this.targets.convert_earlier_instants_to_settle(sim.instant);
                 if this.targets.is_empty() {
                     this.targets.settle = true;
@@ -7739,7 +7736,7 @@ impl<Args: Eq, Fut> Eq for SimGeneratorFn<Args, Fut> {}
 impl<Args: PartialEq, Fut> PartialEq for SimGeneratorFn<Args, Fut> {
     fn eq(&self, other: &Self) -> bool {
         let Self { args, f } = self;
-        *args == other.args && ptr::fn_addr_eq(*f, other.f)
+        *args == other.args && *f == other.f
     }
 }
 

crates/fayalite/src/sim/interpreter.rs

@@ -7,7 +7,7 @@ use crate::{
     intern::{Intern, Interned, Memoize},
     source_location::SourceLocation,
     ty::CanonicalType,
-    util::{HashMap, HashSet},
+    util::{get_many_mut, HashMap, HashSet},
 };
 use bitvec::{boxed::BitBox, slice::BitSlice};
 use num_bigint::BigInt;
@@ -2080,14 +2080,14 @@ impl<
         T,
     > BorrowedStatePart<'a, K>
 {
-    pub(crate) fn get_disjoint_mut<const N: usize>(
+    pub(crate) fn get_many_mut<const N: usize>(
         &mut self,
         indexes: [StatePartIndex<K>; N],
     ) -> [&mut T; N] {
-        (*self.value)
+        get_many_mut(
-            .borrow_mut()
+            (*self.value).borrow_mut(),
-            .get_disjoint_mut(indexes.map(|v| v.value as usize))
+            indexes.map(|v| v.value as usize),
-            .expect("indexes are disjoint")
+        )
     }
 }
 
@@ -2568,7 +2568,7 @@ impl_insns! {
         src: StatePartIndex<StatePartKindBigSlots>,
     } => {
         if dest != src {
-            let [dest, src] = state.big_slots.get_disjoint_mut([dest, src]);
+            let [dest, src] = state.big_slots.get_many_mut([dest, src]);
             dest.clone_from(src);
         }
         next!();
@@ -2590,7 +2590,7 @@ impl_insns! {
     } => {
         if let Some(src) = state.eval_array_indexed(src) {
             if dest != src {
-                let [dest, src] = state.big_slots.get_disjoint_mut([dest, src]);
+                let [dest, src] = state.big_slots.get_many_mut([dest, src]);
                 dest.clone_from(src);
             }
         } else {
@@ -2619,7 +2619,7 @@ impl_insns! {
     } => {
         if let Some(dest) = state.eval_array_indexed(dest) {
             if dest != src {
-                let [dest, src] = state.big_slots.get_disjoint_mut([dest, src]);
+                let [dest, src] = state.big_slots.get_many_mut([dest, src]);
                 dest.clone_from(src);
             }
         }

crates/fayalite/src/sim/value.rs

@@ -11,8 +11,8 @@ use crate::{
     reset::{AsyncReset, Reset, SyncReset},
     ty::{CanonicalType, StaticType, Type},
     util::{
-        ConstUsize,
         alternating_cell::{AlternatingCell, AlternatingCellMethods},
+        ConstUsize,
     },
 };
 use bitvec::{slice::BitSlice, vec::BitVec};

crates/fayalite/src/sim/vcd.rs

@@ -7,12 +7,12 @@ use crate::{
     int::UInt,
     intern::{Intern, Interned},
     sim::{
+        time::{SimDuration, SimInstant},
         TraceArray, TraceAsyncReset, TraceBool, TraceBundle, TraceClock, TraceDecl,
         TraceEnumDiscriminant, TraceEnumWithFields, TraceFieldlessEnum, TraceInstance,
         TraceLocation, TraceMem, TraceMemPort, TraceMemoryId, TraceMemoryLocation, TraceModule,
         TraceModuleIO, TraceReg, TraceSInt, TraceScalar, TraceScalarId, TraceScope, TraceSyncReset,
         TraceUInt, TraceWire, TraceWriter, TraceWriterDecls,
-        time::{SimDuration, SimInstant},
     },
     util::HashMap,
 };

crates/fayalite/src/ty.rs

@@ -16,7 +16,7 @@ use crate::{
     util::ConstUsize,
 };
 use bitvec::slice::BitSlice;
-use serde::{Deserialize, Deserializer, Serialize, Serializer, de::DeserializeOwned};
+use serde::{de::DeserializeOwned, Deserialize, Deserializer, Serialize, Serializer};
 use std::{fmt, hash::Hash, iter::FusedIterator, ops::Index, sync::Arc};
 
 pub(crate) mod serde_impls;

crates/fayalite/src/util.rs

@@ -35,8 +35,8 @@ pub use scoped_ref::ScopedRef;
 
 #[doc(inline)]
 pub use misc::{
-    BitSliceWriteWithBase, DebugAsDisplay, DebugAsRawString, MakeMutSlice, RcWriter, interned_bit,
+    get_many_mut, interned_bit, iter_eq_by, BitSliceWriteWithBase, DebugAsDisplay,
-    iter_eq_by,
+    DebugAsRawString, MakeMutSlice, RcWriter,
 };
 
 pub mod job_server;

crates/fayalite/src/util/const_bool.rs

@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use serde::{
-    Deserialize, Deserializer, Serialize, Serializer,
     de::{DeserializeOwned, Error, Unexpected},
+    Deserialize, Deserializer, Serialize, Serializer,
 };
 use std::{fmt::Debug, hash::Hash, mem::ManuallyDrop, ptr};
 

crates/fayalite/src/util/const_usize.rs

@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: LGPL-3.0-or-later
 // See Notices.txt for copyright information
 use serde::{
-    Deserialize, Deserializer, Serialize, Serializer,
     de::{DeserializeOwned, Error, Unexpected},
+    Deserialize, Deserializer, Serialize, Serializer,
 };
 use std::{fmt::Debug, hash::Hash};
 

crates/fayalite/src/util/misc.rs

@@ -163,6 +163,22 @@ impl fmt::UpperHex for BitSliceWriteWithBase<'_> {
     }
 }
 
+#[inline]
+#[track_caller]
+pub fn get_many_mut<T, const N: usize>(slice: &mut [T], indexes: [usize; N]) -> [&mut T; N] {
+    for i in 0..N {
+        for j in 0..i {
+            assert!(indexes[i] != indexes[j], "duplicate index");
+        }
+        assert!(indexes[i] < slice.len(), "index out of bounds");
+    }
+    // Safety: checked that no indexes are duplicates and no indexes are out of bounds
+    unsafe {
+        let base = slice.as_mut_ptr(); // convert to a raw pointer before loop to avoid aliasing with &mut [T]
+        std::array::from_fn(|i| &mut *base.add(indexes[i]))
+    }
+}
+
 #[derive(Clone, Default)]
 pub struct RcWriter(Rc<Cell<Vec<u8>>>);
 

crates/fayalite/tests/ui/simvalue_is_not_internable.stderr

@@ -4,7 +4,7 @@ error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between thr
 11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
    |                          ^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`, which is required by `SimValue<()>: Sync`
    = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
@@ -28,7 +28,7 @@ error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between th
 11 | fn f(v: SimValue<()>) -> Interned<SimValue<()>> {
    |                          ^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`, which is required by `SimValue<()>: Sync`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
    |
@@ -49,29 +49,29 @@ error[E0277]: the trait bound `SimValue<()>: Intern` is not satisfied
   --> tests/ui/simvalue_is_not_internable.rs:12:26
    |
 12 |     Intern::intern_sized(v)
-   |     -------------------- ^ the trait `Hash` is not implemented for `SimValue<()>`
+   |     -------------------- ^ the trait `Hash` is not implemented for `SimValue<()>`, which is required by `SimValue<()>: Intern`
    |     |
    |     required by a bound introduced by this call
    |
+   = help: the following other types implement trait `Intern`:
+             BitSlice
+             [T]
+             str
    = note: required for `SimValue<()>` to implement `Intern`
-help: consider dereferencing here
-   |
-12 |     Intern::intern_sized(*v)
-   |                          +
 
 error[E0277]: the trait bound `SimValue<()>: Intern` is not satisfied
   --> tests/ui/simvalue_is_not_internable.rs:12:26
    |
 12 |     Intern::intern_sized(v)
-   |     -------------------- ^ the trait `std::cmp::Eq` is not implemented for `SimValue<()>`
+   |     -------------------- ^ the trait `std::cmp::Eq` is not implemented for `SimValue<()>`, which is required by `SimValue<()>: Intern`
    |     |
    |     required by a bound introduced by this call
    |
+   = help: the following other types implement trait `Intern`:
+             BitSlice
+             [T]
+             str
    = note: required for `SimValue<()>` to implement `Intern`
-help: consider dereferencing here
-   |
-12 |     Intern::intern_sized(*v)
-   |                          +
 
 error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
   --> tests/ui/simvalue_is_not_internable.rs:12:26
@@ -81,7 +81,7 @@ error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between thr
    |     |
    |     required by a bound introduced by this call
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`, which is required by `SimValue<()>: Sync`
    = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
@@ -101,10 +101,6 @@ note: required by a bound in `intern_sized`
    |     fn intern(&self) -> Interned<Self>;
    |     fn intern_sized(self) -> Interned<Self>
    |        ------------ required by a bound in this associated function
-help: consider dereferencing here
-   |
-12 |     Intern::intern_sized(*v)
-   |                          +
 
 error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
   --> tests/ui/simvalue_is_not_internable.rs:12:26
@@ -114,7 +110,7 @@ error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between th
    |     |
    |     required by a bound introduced by this call
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`, which is required by `SimValue<()>: Sync`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
    |
@@ -133,10 +129,6 @@ note: required by a bound in `intern_sized`
    |     fn intern(&self) -> Interned<Self>;
    |     fn intern_sized(self) -> Interned<Self>
    |        ------------ required by a bound in this associated function
-help: consider dereferencing here
-   |
-12 |     Intern::intern_sized(*v)
-   |                          +
 
 error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between threads safely
   --> tests/ui/simvalue_is_not_internable.rs:12:5
@@ -144,7 +136,7 @@ error[E0277]: `Cell<util::alternating_cell::State>` cannot be shared between thr
 12 |     Intern::intern_sized(v)
    |     ^^^^^^^^^^^^^^^^^^^^^^^ `Cell<util::alternating_cell::State>` cannot be shared between threads safely
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell<util::alternating_cell::State>`, which is required by `SimValue<()>: Sync`
    = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
@@ -168,7 +160,7 @@ error[E0277]: `UnsafeCell<value::SimValueInner<()>>` cannot be shared between th
 12 |     Intern::intern_sized(v)
    |     ^^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell<value::SimValueInner<()>>` cannot be shared between threads safely
    |
-   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`
+   = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell<value::SimValueInner<()>>`, which is required by `SimValue<()>: Sync`
 note: required because it appears within the type `util::alternating_cell::AlternatingCell<value::SimValueInner<()>>`
   --> src/util/alternating_cell.rs
    |