forked from libre-chip/fayalite
reimplement fayalite::formal and add support to the simulator
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parent
31353862ce
commit
e4b886b9b4
74 changed files with 4042 additions and 662 deletions
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@ -254,6 +254,7 @@ Simulation {
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},
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pc: 34,
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memory_write_log: [],
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assert_failed_log: [],
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memories: StatePart {
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value: [],
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},
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@ -293,6 +294,7 @@ Simulation {
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..
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},
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},
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global_io: {},
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main_module: SimulationModuleState {
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base_targets: [
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Instance {
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@ -545,5 +547,6 @@ Simulation {
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}),
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waiting_sensitivity_sets_by_address: {},
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waiting_sensitivity_sets_by_compiled_value: {},
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asserts: [],
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..
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}
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