forked from libre-chip/fayalite
implement #[hdl] [a; N] -- an array repeat expression
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c2e5ea8e89
4 changed files with 51 additions and 2 deletions
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@ -138,6 +138,41 @@ circuit my_module:
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};
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}
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#[hdl_module(outline_generated)]
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pub fn check_array_repeat() {
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#[hdl]
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let i: UInt<8> = m.input();
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#[hdl]
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let o: Array<[UInt<8>; 3]> = m.output();
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m.connect(
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o,
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#[hdl]
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[i; 3],
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);
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}
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#[test]
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fn test_array_repeat() {
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let _n = SourceLocation::normalize_files_for_tests();
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let m = check_array_repeat();
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dbg!(m);
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#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
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assert_export_firrtl! {
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m =>
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"/test/check_array_repeat.fir": r"FIRRTL version 3.2.0
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circuit check_array_repeat:
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module check_array_repeat: @[module-XXXXXXXXXX.rs 1:1]
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input i: UInt<8> @[module-XXXXXXXXXX.rs 2:1]
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output o: UInt<8>[3] @[module-XXXXXXXXXX.rs 3:1]
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wire _array_literal_expr: UInt<8>[3]
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connect _array_literal_expr[0], i
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connect _array_literal_expr[1], i
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connect _array_literal_expr[2], i
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connect o, _array_literal_expr @[module-XXXXXXXXXX.rs 4:1]
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",
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};
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}
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#[hdl_module(outline_generated)]
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pub fn check_partially_written() {
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#[hdl]
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