forked from libre-chip/fayalite
implement #[hdl(cmp_eq)] for enums
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SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
3 changed files with 530 additions and 7 deletions
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@ -13,7 +13,7 @@ use fayalite::{
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};
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use serde_json::json;
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#[hdl(outline_generated)]
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#[hdl(outline_generated, cmp_eq)]
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pub enum TestEnum {
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A,
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B(UInt<8>),
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@ -679,6 +679,366 @@ circuit check_enum_literals:
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};
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}
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#[hdl_module(outline_generated)]
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pub fn check_enum_cmp_eq() {
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#[hdl]
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let lhs: TestEnum = m.input();
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#[hdl]
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let rhs: TestEnum = m.input();
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#[hdl]
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let eq: Bool = m.output();
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connect(eq, lhs.cmp_eq(rhs));
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}
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#[test]
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fn test_enum_cmp_eq() {
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let _n = SourceLocation::normalize_files_for_tests();
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let m = check_enum_cmp_eq();
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dbg!(m);
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#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
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assert_export_firrtl! {
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m =>
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options: ExportOptions {
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simplify_enums: None,
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..ExportOptions::default()
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},
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"/test/check_enum_cmp_eq.fir": r"FIRRTL version 3.2.0
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circuit check_enum_cmp_eq:
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type Ty0 = {|A, B: UInt<8>, C: UInt<1>[3]|}
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module check_enum_cmp_eq: @[module-XXXXXXXXXX.rs 1:1]
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input lhs: Ty0 @[module-XXXXXXXXXX.rs 2:1]
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input rhs: Ty0 @[module-XXXXXXXXXX.rs 3:1]
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output eq: UInt<1> @[module-XXXXXXXXXX.rs 4:1]
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wire TestEnum_cmp_eq: UInt<1> @[module-XXXXXXXXXX.rs 5:1]
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connect TestEnum_cmp_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 5:1]
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match lhs: @[module-XXXXXXXXXX.rs 5:1]
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A:
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match rhs: @[module-XXXXXXXXXX.rs 5:1]
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A:
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connect TestEnum_cmp_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 5:1]
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B(_match_arm_value):
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skip
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C(_match_arm_value_1):
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skip
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B(_match_arm_value_2):
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match rhs: @[module-XXXXXXXXXX.rs 5:1]
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A:
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skip
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B(_match_arm_value_3):
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connect TestEnum_cmp_eq, eq(_match_arm_value_2, _match_arm_value_3) @[module-XXXXXXXXXX.rs 5:1]
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C(_match_arm_value_4):
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skip
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C(_match_arm_value_5):
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match rhs: @[module-XXXXXXXXXX.rs 5:1]
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A:
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skip
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B(_match_arm_value_6):
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skip
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C(_match_arm_value_7):
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wire _array_literal_expr: UInt<1>[3]
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connect _array_literal_expr[0], eq(_match_arm_value_5[0], _match_arm_value_7[0])
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connect _array_literal_expr[1], eq(_match_arm_value_5[1], _match_arm_value_7[1])
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connect _array_literal_expr[2], eq(_match_arm_value_5[2], _match_arm_value_7[2])
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wire _cast_array_to_bits_expr: UInt<1>[3]
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connect _cast_array_to_bits_expr[0], _array_literal_expr[0]
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connect _cast_array_to_bits_expr[1], _array_literal_expr[1]
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connect _cast_array_to_bits_expr[2], _array_literal_expr[2]
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wire _cast_to_bits_expr: UInt<3>
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connect _cast_to_bits_expr, cat(_cast_array_to_bits_expr[2], cat(_cast_array_to_bits_expr[1], _cast_array_to_bits_expr[0]))
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connect TestEnum_cmp_eq, andr(_cast_to_bits_expr) @[module-XXXXXXXXXX.rs 5:1]
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connect eq, TestEnum_cmp_eq @[module-XXXXXXXXXX.rs 6:1]
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",
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};
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#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
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assert_export_firrtl! {
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m =>
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options: ExportOptions {
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simplify_enums: Some(SimplifyEnumsKind::SimplifyToEnumsWithNoBody),
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..ExportOptions::default()
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},
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"/test/check_enum_cmp_eq.fir": r"FIRRTL version 3.2.0
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circuit check_enum_cmp_eq:
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type Ty0 = {|A, B, C|}
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type Ty1 = {tag: Ty0, body: UInt<8>}
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module check_enum_cmp_eq: @[module-XXXXXXXXXX.rs 1:1]
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input lhs: Ty1 @[module-XXXXXXXXXX.rs 2:1]
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input rhs: Ty1 @[module-XXXXXXXXXX.rs 3:1]
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output eq: UInt<1> @[module-XXXXXXXXXX.rs 4:1]
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wire TestEnum_cmp_eq: UInt<1> @[module-XXXXXXXXXX.rs 5:1]
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connect TestEnum_cmp_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 5:1]
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match lhs.tag: @[module-XXXXXXXXXX.rs 5:1]
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A:
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match rhs.tag: @[module-XXXXXXXXXX.rs 5:1]
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A:
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connect TestEnum_cmp_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 5:1]
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B:
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skip
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C:
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skip
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B:
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match rhs.tag: @[module-XXXXXXXXXX.rs 5:1]
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A:
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skip
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B:
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connect TestEnum_cmp_eq, eq(bits(lhs.body, 7, 0), bits(rhs.body, 7, 0)) @[module-XXXXXXXXXX.rs 5:1]
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C:
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skip
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C:
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match rhs.tag: @[module-XXXXXXXXXX.rs 5:1]
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A:
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skip
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B:
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skip
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C:
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wire _array_literal_expr: UInt<1>[3]
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wire _cast_bits_to_array_expr: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr[0], _cast_bits_to_array_expr_flattened[0]
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connect _cast_bits_to_array_expr_flattened[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr[1], _cast_bits_to_array_expr_flattened[1]
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connect _cast_bits_to_array_expr_flattened[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr[2], _cast_bits_to_array_expr_flattened[2]
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wire _cast_bits_to_array_expr_1: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_1: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_1[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_1[0], _cast_bits_to_array_expr_flattened_1[0]
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connect _cast_bits_to_array_expr_flattened_1[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_1[1], _cast_bits_to_array_expr_flattened_1[1]
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connect _cast_bits_to_array_expr_flattened_1[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_1[2], _cast_bits_to_array_expr_flattened_1[2]
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connect _array_literal_expr[0], eq(_cast_bits_to_array_expr[0], _cast_bits_to_array_expr_1[0])
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wire _cast_bits_to_array_expr_2: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_2: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_2[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_2[0], _cast_bits_to_array_expr_flattened_2[0]
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connect _cast_bits_to_array_expr_flattened_2[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_flattened_2[1]
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connect _cast_bits_to_array_expr_flattened_2[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_2[2], _cast_bits_to_array_expr_flattened_2[2]
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wire _cast_bits_to_array_expr_3: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_3: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_3[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_3[0], _cast_bits_to_array_expr_flattened_3[0]
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connect _cast_bits_to_array_expr_flattened_3[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_3[1], _cast_bits_to_array_expr_flattened_3[1]
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connect _cast_bits_to_array_expr_flattened_3[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_3[2], _cast_bits_to_array_expr_flattened_3[2]
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connect _array_literal_expr[1], eq(_cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_3[1])
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wire _cast_bits_to_array_expr_4: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_4: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_4[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_4[0], _cast_bits_to_array_expr_flattened_4[0]
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connect _cast_bits_to_array_expr_flattened_4[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_4[1], _cast_bits_to_array_expr_flattened_4[1]
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connect _cast_bits_to_array_expr_flattened_4[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_flattened_4[2]
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wire _cast_bits_to_array_expr_5: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_5: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_5[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_5[0], _cast_bits_to_array_expr_flattened_5[0]
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connect _cast_bits_to_array_expr_flattened_5[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_5[1], _cast_bits_to_array_expr_flattened_5[1]
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connect _cast_bits_to_array_expr_flattened_5[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_5[2], _cast_bits_to_array_expr_flattened_5[2]
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connect _array_literal_expr[2], eq(_cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_5[2])
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wire _cast_array_to_bits_expr: UInt<1>[3]
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connect _cast_array_to_bits_expr[0], _array_literal_expr[0]
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connect _cast_array_to_bits_expr[1], _array_literal_expr[1]
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connect _cast_array_to_bits_expr[2], _array_literal_expr[2]
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wire _cast_to_bits_expr: UInt<3>
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connect _cast_to_bits_expr, cat(_cast_array_to_bits_expr[2], cat(_cast_array_to_bits_expr[1], _cast_array_to_bits_expr[0]))
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connect TestEnum_cmp_eq, andr(_cast_to_bits_expr) @[module-XXXXXXXXXX.rs 5:1]
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connect eq, TestEnum_cmp_eq @[module-XXXXXXXXXX.rs 6:1]
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",
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};
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#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
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assert_export_firrtl! {
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m =>
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options: ExportOptions {
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simplify_enums: Some(SimplifyEnumsKind::ReplaceWithBundleOfUInts),
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..ExportOptions::default()
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},
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"/test/check_enum_cmp_eq.fir": r"FIRRTL version 3.2.0
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circuit check_enum_cmp_eq:
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type Ty0 = {tag: UInt<2>, body: UInt<8>}
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module check_enum_cmp_eq: @[module-XXXXXXXXXX.rs 1:1]
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input lhs: Ty0 @[module-XXXXXXXXXX.rs 2:1]
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input rhs: Ty0 @[module-XXXXXXXXXX.rs 3:1]
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output eq: UInt<1> @[module-XXXXXXXXXX.rs 4:1]
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wire TestEnum_cmp_eq: UInt<1> @[module-XXXXXXXXXX.rs 5:1]
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connect TestEnum_cmp_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 5:1]
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when eq(lhs.tag, UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
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when eq(rhs.tag, UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
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connect TestEnum_cmp_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 5:1]
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else when eq(rhs.tag, UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
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skip
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else when eq(lhs.tag, UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
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when eq(rhs.tag, UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
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skip
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else when eq(rhs.tag, UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
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connect TestEnum_cmp_eq, eq(bits(lhs.body, 7, 0), bits(rhs.body, 7, 0)) @[module-XXXXXXXXXX.rs 5:1]
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else when eq(rhs.tag, UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
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skip
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else when eq(rhs.tag, UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
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skip
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else:
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wire _array_literal_expr: UInt<1>[3]
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wire _cast_bits_to_array_expr: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr[0], _cast_bits_to_array_expr_flattened[0]
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connect _cast_bits_to_array_expr_flattened[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr[1], _cast_bits_to_array_expr_flattened[1]
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connect _cast_bits_to_array_expr_flattened[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr[2], _cast_bits_to_array_expr_flattened[2]
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wire _cast_bits_to_array_expr_1: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_1: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_1[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_1[0], _cast_bits_to_array_expr_flattened_1[0]
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connect _cast_bits_to_array_expr_flattened_1[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_1[1], _cast_bits_to_array_expr_flattened_1[1]
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connect _cast_bits_to_array_expr_flattened_1[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_1[2], _cast_bits_to_array_expr_flattened_1[2]
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connect _array_literal_expr[0], eq(_cast_bits_to_array_expr[0], _cast_bits_to_array_expr_1[0])
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wire _cast_bits_to_array_expr_2: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_2: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_2[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_2[0], _cast_bits_to_array_expr_flattened_2[0]
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connect _cast_bits_to_array_expr_flattened_2[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_flattened_2[1]
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connect _cast_bits_to_array_expr_flattened_2[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_2[2], _cast_bits_to_array_expr_flattened_2[2]
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wire _cast_bits_to_array_expr_3: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_3: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_3[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_3[0], _cast_bits_to_array_expr_flattened_3[0]
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connect _cast_bits_to_array_expr_flattened_3[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_3[1], _cast_bits_to_array_expr_flattened_3[1]
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connect _cast_bits_to_array_expr_flattened_3[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_3[2], _cast_bits_to_array_expr_flattened_3[2]
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connect _array_literal_expr[1], eq(_cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_3[1])
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wire _cast_bits_to_array_expr_4: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_4: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_4[0], bits(bits(lhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_4[0], _cast_bits_to_array_expr_flattened_4[0]
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connect _cast_bits_to_array_expr_flattened_4[1], bits(bits(lhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_4[1], _cast_bits_to_array_expr_flattened_4[1]
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connect _cast_bits_to_array_expr_flattened_4[2], bits(bits(lhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_flattened_4[2]
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wire _cast_bits_to_array_expr_5: UInt<1>[3]
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wire _cast_bits_to_array_expr_flattened_5: UInt<1>[3]
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connect _cast_bits_to_array_expr_flattened_5[0], bits(bits(rhs.body, 2, 0), 0, 0)
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connect _cast_bits_to_array_expr_5[0], _cast_bits_to_array_expr_flattened_5[0]
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connect _cast_bits_to_array_expr_flattened_5[1], bits(bits(rhs.body, 2, 0), 1, 1)
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connect _cast_bits_to_array_expr_5[1], _cast_bits_to_array_expr_flattened_5[1]
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connect _cast_bits_to_array_expr_flattened_5[2], bits(bits(rhs.body, 2, 0), 2, 2)
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connect _cast_bits_to_array_expr_5[2], _cast_bits_to_array_expr_flattened_5[2]
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connect _array_literal_expr[2], eq(_cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_5[2])
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wire _cast_array_to_bits_expr: UInt<1>[3]
|
||||
connect _cast_array_to_bits_expr[0], _array_literal_expr[0]
|
||||
connect _cast_array_to_bits_expr[1], _array_literal_expr[1]
|
||||
connect _cast_array_to_bits_expr[2], _array_literal_expr[2]
|
||||
wire _cast_to_bits_expr: UInt<3>
|
||||
connect _cast_to_bits_expr, cat(_cast_array_to_bits_expr[2], cat(_cast_array_to_bits_expr[1], _cast_array_to_bits_expr[0]))
|
||||
connect TestEnum_cmp_eq, andr(_cast_to_bits_expr) @[module-XXXXXXXXXX.rs 5:1]
|
||||
connect eq, TestEnum_cmp_eq @[module-XXXXXXXXXX.rs 6:1]
|
||||
",
|
||||
};
|
||||
#[rustfmt::skip] // work around https://github.com/rust-lang/rustfmt/issues/6161
|
||||
assert_export_firrtl! {
|
||||
m =>
|
||||
options: ExportOptions {
|
||||
simplify_enums: Some(SimplifyEnumsKind::ReplaceWithUInt),
|
||||
..ExportOptions::default()
|
||||
},
|
||||
"/test/check_enum_cmp_eq.fir": r"FIRRTL version 3.2.0
|
||||
circuit check_enum_cmp_eq:
|
||||
module check_enum_cmp_eq: @[module-XXXXXXXXXX.rs 1:1]
|
||||
input lhs: UInt<10> @[module-XXXXXXXXXX.rs 2:1]
|
||||
input rhs: UInt<10> @[module-XXXXXXXXXX.rs 3:1]
|
||||
output eq: UInt<1> @[module-XXXXXXXXXX.rs 4:1]
|
||||
wire TestEnum_cmp_eq: UInt<1> @[module-XXXXXXXXXX.rs 5:1]
|
||||
connect TestEnum_cmp_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 5:1]
|
||||
when eq(bits(lhs, 1, 0), UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
when eq(bits(rhs, 1, 0), UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
connect TestEnum_cmp_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 5:1]
|
||||
else when eq(bits(rhs, 1, 0), UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
skip
|
||||
else when eq(bits(lhs, 1, 0), UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
when eq(bits(rhs, 1, 0), UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
skip
|
||||
else when eq(bits(rhs, 1, 0), UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
connect TestEnum_cmp_eq, eq(bits(bits(lhs, 9, 2), 7, 0), bits(bits(rhs, 9, 2), 7, 0)) @[module-XXXXXXXXXX.rs 5:1]
|
||||
else when eq(bits(rhs, 1, 0), UInt<2>(0h0)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
skip
|
||||
else when eq(bits(rhs, 1, 0), UInt<2>(0h1)): @[module-XXXXXXXXXX.rs 5:1]
|
||||
skip
|
||||
else:
|
||||
wire _array_literal_expr: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened[0], bits(bits(bits(lhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr[0], _cast_bits_to_array_expr_flattened[0]
|
||||
connect _cast_bits_to_array_expr_flattened[1], bits(bits(bits(lhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr[1], _cast_bits_to_array_expr_flattened[1]
|
||||
connect _cast_bits_to_array_expr_flattened[2], bits(bits(bits(lhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr[2], _cast_bits_to_array_expr_flattened[2]
|
||||
wire _cast_bits_to_array_expr_1: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened_1: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened_1[0], bits(bits(bits(rhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr_1[0], _cast_bits_to_array_expr_flattened_1[0]
|
||||
connect _cast_bits_to_array_expr_flattened_1[1], bits(bits(bits(rhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr_1[1], _cast_bits_to_array_expr_flattened_1[1]
|
||||
connect _cast_bits_to_array_expr_flattened_1[2], bits(bits(bits(rhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr_1[2], _cast_bits_to_array_expr_flattened_1[2]
|
||||
connect _array_literal_expr[0], eq(_cast_bits_to_array_expr[0], _cast_bits_to_array_expr_1[0])
|
||||
wire _cast_bits_to_array_expr_2: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened_2: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened_2[0], bits(bits(bits(lhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr_2[0], _cast_bits_to_array_expr_flattened_2[0]
|
||||
connect _cast_bits_to_array_expr_flattened_2[1], bits(bits(bits(lhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_flattened_2[1]
|
||||
connect _cast_bits_to_array_expr_flattened_2[2], bits(bits(bits(lhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr_2[2], _cast_bits_to_array_expr_flattened_2[2]
|
||||
wire _cast_bits_to_array_expr_3: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened_3: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened_3[0], bits(bits(bits(rhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr_3[0], _cast_bits_to_array_expr_flattened_3[0]
|
||||
connect _cast_bits_to_array_expr_flattened_3[1], bits(bits(bits(rhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr_3[1], _cast_bits_to_array_expr_flattened_3[1]
|
||||
connect _cast_bits_to_array_expr_flattened_3[2], bits(bits(bits(rhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr_3[2], _cast_bits_to_array_expr_flattened_3[2]
|
||||
connect _array_literal_expr[1], eq(_cast_bits_to_array_expr_2[1], _cast_bits_to_array_expr_3[1])
|
||||
wire _cast_bits_to_array_expr_4: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened_4: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened_4[0], bits(bits(bits(lhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr_4[0], _cast_bits_to_array_expr_flattened_4[0]
|
||||
connect _cast_bits_to_array_expr_flattened_4[1], bits(bits(bits(lhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr_4[1], _cast_bits_to_array_expr_flattened_4[1]
|
||||
connect _cast_bits_to_array_expr_flattened_4[2], bits(bits(bits(lhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_flattened_4[2]
|
||||
wire _cast_bits_to_array_expr_5: UInt<1>[3]
|
||||
wire _cast_bits_to_array_expr_flattened_5: UInt<1>[3]
|
||||
connect _cast_bits_to_array_expr_flattened_5[0], bits(bits(bits(rhs, 9, 2), 2, 0), 0, 0)
|
||||
connect _cast_bits_to_array_expr_5[0], _cast_bits_to_array_expr_flattened_5[0]
|
||||
connect _cast_bits_to_array_expr_flattened_5[1], bits(bits(bits(rhs, 9, 2), 2, 0), 1, 1)
|
||||
connect _cast_bits_to_array_expr_5[1], _cast_bits_to_array_expr_flattened_5[1]
|
||||
connect _cast_bits_to_array_expr_flattened_5[2], bits(bits(bits(rhs, 9, 2), 2, 0), 2, 2)
|
||||
connect _cast_bits_to_array_expr_5[2], _cast_bits_to_array_expr_flattened_5[2]
|
||||
connect _array_literal_expr[2], eq(_cast_bits_to_array_expr_4[2], _cast_bits_to_array_expr_5[2])
|
||||
wire _cast_array_to_bits_expr: UInt<1>[3]
|
||||
connect _cast_array_to_bits_expr[0], _array_literal_expr[0]
|
||||
connect _cast_array_to_bits_expr[1], _array_literal_expr[1]
|
||||
connect _cast_array_to_bits_expr[2], _array_literal_expr[2]
|
||||
wire _cast_to_bits_expr: UInt<3>
|
||||
connect _cast_to_bits_expr, cat(_cast_array_to_bits_expr[2], cat(_cast_array_to_bits_expr[1], _cast_array_to_bits_expr[0]))
|
||||
connect TestEnum_cmp_eq, andr(_cast_to_bits_expr) @[module-XXXXXXXXXX.rs 5:1]
|
||||
connect eq, TestEnum_cmp_eq @[module-XXXXXXXXXX.rs 6:1]
|
||||
",
|
||||
};
|
||||
}
|
||||
|
||||
#[hdl_module(outline_generated)]
|
||||
pub fn check_struct_enum_match() {
|
||||
#[hdl]
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue