forked from libre-chip/fayalite
correctly handle hdl byte literal suffixes
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parent
c2e5ea8e89
commit
63fd038729
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@ -1392,7 +1392,9 @@ impl Visitor {
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fn process_literal(&mut self, literal: ExprLit) -> Expr {
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fn process_literal(&mut self, literal: ExprLit) -> Expr {
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let ExprLit { attrs, lit } = literal;
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let ExprLit { attrs, lit } = literal;
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match &lit {
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match &lit {
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Lit::Byte(lit_byte) if lit_byte.suffix() == "hdl" => {
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Lit::Byte(lit_byte) => {
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let trimmed_suffix = lit_byte.suffix().trim_start_matches('_');
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if trimmed_suffix == "hdl" || trimmed_suffix == "hdl_u8" {
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if let Some(retval) = self.process_int_literal(
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if let Some(retval) = self.process_int_literal(
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lit_byte.span(),
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lit_byte.span(),
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&lit_byte.value().to_string(),
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&lit_byte.value().to_string(),
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@ -1401,6 +1403,7 @@ impl Visitor {
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return retval;
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return retval;
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}
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}
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}
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}
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}
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Lit::Int(lit_int) => {
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Lit::Int(lit_int) => {
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if let Some(retval) = self.process_int_literal(
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if let Some(retval) = self.process_int_literal(
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lit_int.span(),
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lit_int.span(),
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@ -57,7 +57,7 @@ pub fn my_module(width: usize) {
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m.connect(
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m.connect(
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o,
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o,
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#[hdl]
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#[hdl]
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[r, r, 13_hdl_u8],
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[r, r, b'\r'_hdl],
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);
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);
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m.connect(o[1], 30_hdl_u8);
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m.connect(o[1], 30_hdl_u8);
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m.connect(o2, i2);
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m.connect(o2, i2);
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